INTEGRATED CIRCUITS
74LVT16646A
3.3V ABT 16-bit bus transceiver (3-State)
Product specification
Supersedes data of 1994 Jul 25
IC23 Data Handbook
1998 Feb 19
Philips
Semiconductors
Philips Semiconductors
Product specification
3.3V 16-bit bus transceiver (3-State)
74LVT16646A
FEATURES
•
16-bit universal bus interface
•
3-State buffers
•
Output capability: +64mA/-32mA
•
TTL input and output switching levels
•
Input and output interface capability to systems at 5V supply
•
Bus-hold data inputs eliminate the need for external pull-up
•
•
No bus current loading when output is tied to 5V bus
•
Power-up reset
•
Power-up 3-State
•
Latch-up protection exceeds 500mA per JEDEC Std 17
•
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
resistors to hold unused inputs
Live insertion/extraction permitted
DESCRIPTION
The 74LVT16646A is a high-performance BiCMOS product
designed for V
CC
operation at 3.3V.
This device is a 16-bit transceiver featuring non-inverting 3-State
bus compatible outputs in both send and receive directions. The
control function implementation minimizes external timing
requirements. The device features an Output Enable (OE) input for
easy cascading and a Direction (DIR) input for direction control.
Data on the A or B bus is clocked into the registers on the Low to
High transition of the appropriate clock (CPAB or CPBA). The
select-control (SAB and SBA) inputs can multiplex stored and
real-time (transparent mode data).
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
I/O
I
CCZ
PARAMETER
Propagation delay
nAx to nBx or nBx to nAx
Input capacitance
I/O pin capacitance
Total supply current
C
L
= 50pF;
V
CC
= 3.3V
V
I
= 0V or 3.0V
Outputs disabled; V
I/O
= 0V or 3.0V
Outputs disabled; V
CC
= 3.6V
CONDITIONS
T
amb
= 25°C
TYPICAL
1.9
3
9
70
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74LVT166646A DL
74LVT16646A DGG
NORTH AMERICA
VT16646A DL
VT16646A DGG
DWG NUMBER
SOT371-1
SOT364-1
LOGIC SYMBOL (IEEE/IEC)
56
1
54
3
55
2
G3
3EN1 [BA]
3EN2 [AB]
G6
G7
C4
C5
28
31
26
31
27
29
G10
10EN8 [BA]
10EN9 [AB]
G13
G14
C11
C12
5
≥1
∇1
6
6 1
4D
52
15
≥1
∇8
13 11D
13 1
42
5D
1
6
8
9
10
12
13
14
7
7
≥1
2∇
12D 14
1
51
49
48
47
45
44
43
16
17
19
20
21
23
24
14
≥1
9∇
41
40
38
37
36
34
33
SW00157
1998 Feb 19
2
853-1760 18986
Philips Semiconductors
Product specification
3.3V 16-bit bus transceiver (3-State)
74LVT16646A
PIN CONFIGURATION
1DIR
1CPAB
1SAB
GND
1A0
1A1
V
CC
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A1
2A2
GND
2A3
2A4
2A5
V
CC
2A6
2A7
GND
2SAB
2CPAB
2DIR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE
1CPBA
1SBA
GND
1B0
LOGIC SYMBOL
5
6
8
9
10
12
13
14
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
2
1CPAB
1SAB
1DIR
1CPBA
1SBA
1OE
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
1B1
V
CC
1B2
1B3
1B4
GND
1B5
1B6
1B7
2B0
2B1
2B2
GND
2B3
2B4
2B5
V
CC
2B6
3
1
55
54
56
52 51
15 16
49
17
48
19
47
20
45 44
21 23
43
24
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
27
26
28
30
31
29
2CPAB
2SAB
2DIR
2CPBA
2SBA
2OE
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
42 41
2B7
GND
2SBA
2CPBA
20E
40
38
37
36 34
33
SH00027
SH00026
PIN DESCRIPTION
PIN NUMBER
2, 55, 27, 30
3, 54, 26, 31
1, 28
5, 6, 8, 9, 10, 12, 13, 14
15, 16, 17, 19, 20, 21, 23, 24
52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40, 38, 37, 36, 34, 33
56, 29
4, 11, 18, 25, 32, 39, 46, 53
7, 22, 35, 50
SYMBOL
1CPAB, 1CPBA, 2CPAB, 2CPBA
1SAB, 1SBA, 2SAB, 2SBA
1DIR, 2DIR
1A0 - 1A7,
2A0 - 2A7
1B0 - 1B7,
2B0 - 2B7
1OE, 2OE
GND
V
CC
NAME AND FUNCTION
Clock input A to B / Clock input B to A
Select input A to B / Select input B to A
Direction control inputs
Data inputs/outputs (A side)
Data inputs/outputs (B side)
Output enable inputs
Ground (0V)
Positive supply voltage
1998 Feb 19
3
Philips Semiconductors
Product specification
3.3V 16-bit bus transceiver (3-State)
74LVT16646A
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74LVT16646A.
REAL TIME BUS TRANSFER
BUS B TO BUS A
REAL TIME BUS TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
A
B
A
B
A
B
}
nOE
L
nDIR nCPAB nCPBA nSAB nSBA
L
X
X
X
L
nOE
L
nDIR nCPAB nCPBA nSAB nSBA
H
X
X
L
X
TRANSFER STORED DATA
TO A OR B
}
nOE
L
L
H
L
X
nDIR nCPAB nCPBA nSAB nSBA
H
↑
X
X
X
X
↑
↑
↑
X
X
X
X
}
A
B
}
nOE
L
L
nDIR nCPAB nCPBA nSAB nSBA
L
X
H|L
X
H
H
H|L
X
H
X
SH00028
1998 Feb 19
4
Philips Semiconductors
Product specification
3.3V 16-bit bus transceiver (3-State)
74LVT16646A
LOGIC DIAGRAM
nOE
nDIR
nCPBA
nSBA
nCPAB
nSAB
1 of 16 Channels
1D
C1
Q
nA0
1D
C1
Q
nB0
nA1
nA2
nA3
nA4
nA5
nA6
nA7
DETAIL A X 7
nB1
nB2
nB3
nB4
nB5
nB6
nB7
SH00029
FUNCTION TABLE
INPUTS
nOE
X
X
H
H
L
L
L
L
H
L
X
↑
*
=
=
=
=
nDIR
X
X
X
X
L
L
H
H
nCPAB
↑
X
↑
H or L
X
X
X
H or L
nCPBA
X
↑
↑
H or L
X
H or L
X
X
nSAB
X
X
X
X
X
X
L
H
nSBA
X
X
X
X
L
H
X
X
nAx
Input
Unspecified
output*
Input
Output
Input
DATA I/O
OPERATING MODE
nBx
Unspecified
output*
Input
Input
Input
Output
Store A, B unspecified
Store B, A unspecified
Store A and B data
Isolation, hold storage
Real time B data to A bus
Stored B data to A bus
Real time A data to B bus
Stored A data to B bus
High voltage level
Low voltage level
Don’t care
Low-to-High clock transition
The data output function may be enabled or disabled by various signals at the nOE input. Data input functions are always enabled, i.e.,
data at the bus pins will be stored on every Low-to-High transition of the clock.
1998 Feb 19
5
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