INTEGRATED CIRCUITS
74ALVC16244/74ALVCH16244
2.5V/3.3V 16-bit buffer/line driver (3-State)
Product specification
Supersedes data of 1997 Mar 21
IC24 Data Handbook
1998 Jun 29
Philips
Semiconductors
Philips Semiconductors
Product specification
16-bit buffer/line driver (3-State)
74ALVC16244/
74ALVCH16244
FEATURES
•
Wide supply voltage range of 1.2V to 3.6V
•
Complies with JEDEC standard no. 8-1A
•
CMOS low power consumption
•
MULTIBYTE
TM
flow-through standard pin-out architecture
•
Low inductance multiple V
CC
and GND pins for minimum noise
and ground bounce
PIN CONFIGURATION
1OE
1Y0
1Y1
GND
1Y2
1Y3
V
CC
2Y0
2Y1
1
2
3
4
5
6
7
8
9
48 2OE
47 1A0
46 1A1
45 GND
44 1A2
43 1A3
42 V
CC
41 2A0
40 2A1
39 GND
38 2A2
37 2A3
36 3A0
35 3A1
34 GND
33 3A2
32 3A3
31 V
CC
30 4A0
29 4A1
28 GND
27 4A2
26 4A3
25 3OE
•
Direct interface with TTL levels
•
Bus hold on data inputs (74ALVCH16244 only)
•
Output drive capability 50Ω transmission lines @ 85°C
•
Current drive
±24
mA at 3.0 V
DESCRIPTION
The 74ALVC16244(74ALVCH16244) is a 16-bit non-inverting
buffer/line driver with 3-State outputs. The device can be used as
four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The 3-State
outputs are controlled by the output enable inputs 1OE and 2OE. A
HIGH on nOE causes the outputs to assume a high impedance
OFF-state.
The 74ALVCH16244 has active bus hold circuitry which is provided
to hold unused or floating data inputs at a valid logic level. This
feature eliminates the need for external pull-up or pull-down
resistors.
The 74ALVC16244 has 5V tolerant inputs.
GND 10
2Y2 11
2Y3 12
3Y0 13
3Y1 14
GND 15
3Y2 16
3Y3 17
V
CC
18
4Y0 19
4Y1 20
GND 21
4Y2 22
4Y3 23
4OE 24
SW00194
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25°C; t
r
= t
f
≤
2.5 ns
SYMBOL
t
PHL
/t
PLH
C
I
C
PD
PARAMETER
Propagation delay
An to Yn
Input capacitance
Power dissipation capacitance per buffer
V
I
= GND to V
CC1
Outputs enabled
Outputs disabled
CONDITIONS
V
CC
= 2.5V, CL = 30pF
V
CC
= 3.3V, CL = 50pF
TYPICAL
1.9
1.9
5.0
25
4
UNIT
ns
pF
pF
NOTE:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
mW):
P
D
= C
PD
×
V
CC2
×
f
i
+
S
(C
L
×
V
CC2
×
f
o
) where: f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
S
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
48-Pin Plastic SSOP Type III
48-Pin Plastic TSSOP Type II
48-Pin Plastic SSOP Type III
48-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ALVC16244 DL
74ALVC16244 DGG
74ALVCH16244 DL
74ALVCH16244 DGG
NORTH AMERICA
AC16244 DL
AC16244 DGG
ACH16244 DL
ACH16244 DGG
DWG NUMBER
SOT370-1
SOT362-1
SOT370-1
SOT362-1
1998 Jun 29
2
853-2082 19638
Philips Semiconductors
Product specification
16-bit buffer/line driver (3-State)
74ALVC16244/
74ALVCH16244
PIN DESCRIPTION
PIN NUMBER
1
2, 3, 5, 6
4, 10, 15, 21,
28, 34, 39, 45
7, 18, 31, 42
8, 9, 11, 12
13, 14, 16, 17
19, 20, 22, 23
24
25
30, 29, 27, 26
36, 35, 33, 32
41, 40, 38, 37
47, 46, 44, 43
48
SYMBOL
1OE
1Y0 to 1Y3
GND
V
CC
2Y0 to 2Y3
3Y0 to 3Y3
4Y0 to 4Y3
4OE
3OE
4A0 to 4A3
3A0 to 3A3
2A0 to 2A3
1A0 to 1A3
2OE
NAME AND FUNCTION
Output enable input
(active LOW)
Data outputs
Ground (0V)
Positive supply voltage
Data outputs
Data outputs
Data outputs
Output enable input
(active LOW)
Output enable input
(active LOW)
Data inputs
Data inputs
Data inputs
Data inputs
Output enable input
(active LOW)
FUNCTION TABLE
INPUTS
nOE
L
L
H
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
nAn
L
H
X
OUTPUT
nYn
L
H
Z
LOGIC SYMBOL (IEEE/IEC)
1OE
2OE
3OE
4OE
1A0
1A1
1A2
1A3
2A0
1
48
25
24
47
46
44
43
41
1
40
38
37
36
35
33
32
30
29
27
26
1
4
∇
1
3
∇
2
∇
1EN
2EN
3EN
4EN
1
1
∇
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
3Y0
3Y1
3Y2
3Y3
4Y0
4Y1
4Y2
4Y3
LOGIC SYMBOL
1A0
47
2
1Y0
3A0
36
13
3Y0
2A1
2A2
2A3
3A0
1A1
46
3
1Y1
3A1
35
14
3Y1
3A1
3A2
1A2
44
5
1Y2
3A2
33
16
3Y2
3A3
4A0
1A3
43
6
1Y3
3A3
32
17
3Y3
4A1
4A2
1OE
1
3OE
25
4A3
SW00056
2A0
41
8
2Y0
4A0
30
19
4Y0
BUS HOLD CIRCUIT
2A1
40
9
2Y1
4A1
29
20
4Y1
V
CC
2A2
38
11
2Y2
4A2
27
22
4Y2
2A3
37
12
2Y3
4A3
26
23
4Y3
2OE
48
4OE
24
Data Input
To internal circuit
SW00195
SW00044
1998 Jun 29
3
Philips Semiconductors
Product specification
16-bit buffer/line driver (3-State)
74ALVC16244/
74ALVCH16244
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
DC supply voltage 2.5V range (for max. speed
performance @ 30 pF output load)
V
CC
DC supply voltage 3.3V range (for max. speed
performance @ 50 pF output load)
DC supply voltage (for low-voltage applications)
For data input pins with
bus hold
V
I
DC Input voltage range
For data input pins without
bus hold
For control pins
V
O
T
amb
t
r
, t
f
DC output voltage range
Operating free-air temperature range
Input rise and fall times
V
CC
= 2.3 to 3.0V
V
CC
= 3.0 to 3.6V
CONDITIONS
MIN
2.3
3.0
1.2
0
0
0
0
–40
0
0
MAX
2.7
3.6
3.6
V
CC
5.5
5.5
V
CC
+85
20
10
V
°C
ns/V
V
V
UNIT
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
V
CC
I
IK
PARAMETER
DC supply voltage
DC input diode current
V
I
t0
For data inputs with bus hold
2
V
I
DC input voltage
For data inputs without bus hold
2
For control pins
2
I
OK
V
O
I
O
I
GND
, I
CC
T
stg
P
TOT
DC output diode current
DC output voltage
DC output source or sink current
DC V
CC
or GND current
Storage temperature range
Power dissipation per package
–plastic medium-shrink (SSOP)
–plastic thin-medium-shrink (TSSOP)
For temperature range: –40 to +125
°C
above +55°C derate linearly with 11.3 mW/K
above +55°C derate linearly with 8 mW/K
V
O
uV
CC
or V
O
t
0
Note 2
V
O
= 0 to V
CC
CONDITIONS
RATING
–0.5 to +4.6
–50
–0.5 to V
CC
+0.5
–0.5 to +5.5
–0.5 to +5.5
"50
–0.5 to V
CC
+0.5
"50
"100
–65 to +150
850
600
mA
V
mA
mA
°C
mW
V
UNIT
V
mA
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jun 29
4
Philips Semiconductors
Product specification
16-bit buffer/line driver (3-State)
74ALVC16244/
74ALVCH16244
DC CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
V
CC
= 1.2V
V
IH
HIGH level Input voltage
In ut
V
CC
= 1.8V
V
CC
= 2.3 to 2.7V
V
CC
= 2.7 to 3.6V
V
CC
= 1.2V
V
IL
LOW level In ut voltage
Input
V
CC
= 1.8V
V
CC
= 2.3 to 2.7V
V
CC
= 2.7 to 3.6V
V
CC
= 1 8 to 3 6V; V
I
= V
IH
or V
IL
; I
O
= –100µA
1.8 3.6V;
V
CC
= 1.8V; V
I
= V
IH
or V
IL
; I
O
= –6mA
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= –6mA
V
OH
HIGH level output voltage
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= –12mA
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= –18mA
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= –12mA
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= –24mA
V
CC
= 1 8 to 3 6V; V
I
= V
IH
or V
IL
; I
O
= 100µA
1.8 3.6V;
V
CC
= 1.8V; V
I
= V
IH
or V
IL
; I
O
= 6mA
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= 6mA
V
OL
LOW level output voltage
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= 12mA
V
CC
= 2.3V; V
I
= V
IH
or V
IL
; I
O
= 18mA
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA
Input leakage current per data pin
with bus hold
I
I
Input leakage current per data pin
without bus hold
Input leakage current per control
pin
I
IHZ
/I
ILZ
Input current for common I/O pins
V
CC
= 1.8 to 3.6V;
V
I
= V
CC
or GND
V
CC
= 1.8 to 3.6V;
V
I
= 5.5 V or GND
V
CC
= 1.8 to 3.6V;
V
I
= 5.5 V or GND
V
CC
= 1.8 to 2.7V; V
I
= V
CC
or GND
V
CC
= 3.6V; V
I
= V
CC
or GND
V
CC
= 1.8 to 2.7V; V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND
V
CC
= 2.7 to 3.6V; V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND
V
CC
= 1.8 to 2.7V; V
I
= V
CC
or GND; I
O
= 0
V
CC
= 2.3 to 3.6V; V
I
= V
CC
or GND; I
O
= 0
V
CC
–0 2
–0.2
V
CC
–0.4
V
CC
–0.3
V
CC
–0.5
V
CC
–0.6
V
CC
–0.5
V
CC
–1.0
0.9
1.2
1.5
V
CC
V
CC
–0.10
V
CC
–0.08
V
CC
–0.17
V
CC
–0.26
V
CC
–0.14
V
CC
–0.28
GND
0.09
0.07
0.15
0.23
0.14
0.27
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.2
150
0 20
0.20
0.30
0.20
0.40
0.60
0.40
0.55
5
5
5
10
15
5
µA
10
20
40
750
µA
µA
µA
µA
V
V
TEST CONDITIONS
Temp = -40°C to +85°C
MIN
V
CC
0.7*V
CC
1.7
2.0
0.9
1.2
1.5
GND
0.2*V
CC
0.7
0.8
V
V
TYP
1
MAX
UNIT
I
OZ
3-State output OFF-state current
out ut
I
CC
Quiescent supply current
su ly
Additional quiescent supply current
given per data I/O pin with bus
hold
∆I
CC
Additional quiescent supply current
given per data I/O pin without bus
hold
Additional quiescent supply current
given per control pin
V
CC
= 2.7V to 3.6V; V
I
= V
CC
– 0.6V; I
O
= 0
5
5
500
500
1998 Jun 29
5
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