BUK7524-55A; BUK7624-55A
TrenchMOS™ standard level FET
Rev. 01 — 25 October 2000
Product specification
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using
TrenchMOS™ technology, featuring very low on-state resistance.
Product availability:
BUK7524-55A in SOT78 (TO-220AB)
BUK7624-55A in SOT404
(D
2
-PAK).
2. Features
s
s
s
s
TrenchMOS™ technology
Q101 compliant
175
°C
rated
Standard level compatible.
3. Applications
c
c
s
Automotive and general purpose power switching:
x
12 V and 24 V loads
x
Motors, lamps and solenoids.
4. Pinning information
Table 1:
Pin
1
2
3
mb
Pinning - SOT78, SOT404, simplified outline and symbol
Description
gate (g)
mb
Simplified outline
Symbol
drain (d)
source (s)
mounting base;
connected to drain (d)
mb
d
g
s
2
MBK106
MBB076
1
3
MBK116
1 2 3
SOT78 (TO-220AB)
SOT404 (D
2
-PAK)
Philips Semiconductors
BUK7524-55A; BUK7624-55A
TrenchMOS™ standard level FET
5. Quick reference data
Table 2:
V
DS
I
D
P
tot
T
j
R
DSon
Quick reference data
Conditions
T
mb
= 25
°C;
V
GS
= 10 V
T
mb
= 25
°C
V
GS
= 10 V; I
D
= 25 A
T
j
= 25
°C
T
j
= 175
°C
−
−
24
48
Typ
−
−
−
−
Max
55
47
106
175
Unit
V
A
W
°C
drain-source voltage (DC)
drain current (DC)
total power dissipation
junction temperature
drain-source on-state resistance
Symbol Parameter
m
Ω
m
Ω
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
DGR
V
GS
I
D
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage (DC)
drain current (DC)
T
mb
= 25
°C;
V
GS
= 10 V;
Figure 2
and
3
T
mb
= 100
°C;
V
GS
= 10 V;
Figure 2
I
DM
P
tot
T
stg
T
j
I
DR
I
DRM
W
DSS
peak drain current
total power dissipation
storage temperature
operating junction temperature
reverse drain current (DC)
pulsed reverse drain current
non-repetitive avalanche energy
T
mb
= 25
°C
T
mb
= 25
°C;
pulsed; t
p
≤
10
µs
unclamped inductive load; I
D
= 39 A;
V
DS
≤
55 V; V
GS
= 10 V; R
GS
= 50
Ω;
starting T
mb
= 25
°C
T
mb
= 25
°C;
pulsed; t
p
≤
10
µs;
Figure 3
T
mb
= 25
°C;
Figure 1
R
GS
= 20 kΩ
Conditions
Min
−
−
−
−
−
−
−
−55
−55
−
−
−
Max
55
55
±20
47
33.2
188
106
+175
+175
47
188
76
Unit
V
V
V
A
A
A
W
°C
°C
A
A
mJ
Source-drain diode
Avalanche ruggedness
9397 750 07641
© Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 — 25 October 2000
2 of 15
Philips Semiconductors
BUK7524-55A; BUK7624-55A
TrenchMOS™ standard level FET
03aa24
120
P
(%)
der
100
03na19
120
Ider
(%)
100
80
80
60
60
40
40
20
20
0
0
0
25
50
75
100
125
150 175 200
Tmb (oC)
0
25
50
75
100
125
150
175
200
Tmb (oC)
P
tot
P
der
=
----------------------
×
100%
P
°
tot
(
25 C
)
V
GS
≥
4.5 V
I
D
I
der
=
------------------
×
100%
-
I
°
D
(
25 C
)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
1000
ID
(A)
RDSon = VDS/ ID
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
03nb74
100
tp = 10 us
100 us
10
P
tp
δ
=
T
D.C.
1 ms
10 ms
tp
T
t
100 ms
1
1
10
VDS (V) 100
T
mb
= 25
°C;
I
DM
single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 07641
© Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 — 25 October 2000
3 of 15
Philips Semiconductors
BUK7524-55A; BUK7624-55A
TrenchMOS™ standard level FET
7. Thermal characteristics
Table 4:
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to ambient
Conditions
vertical in still air; SOT78 package
mounted on printed circuit board;
minimum footprint; SOT404
package
R
th(j-mb)
thermal resistance from junction to mounting
base
Figure 4
Value
60
50
Unit
K/W
K/W
1.4
K/W
7.1 Transient thermal impedance
10
Zth(j-mb)
(K/W)
03nb75
1
δ=
0.5
0.2
0.1
0.1
P
0.05
δ
=
tp
T
0.02
tp
Single Shot
t
T
0.01
10-6
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 07641
© Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 — 25 October 2000
4 of 15
Philips Semiconductors
BUK7524-55A; BUK7624-55A
TrenchMOS™ standard level FET
8. Characteristics
Table 5: Characteristics
T
j
= 25
°
C unless otherwise specified
Symbol
V
(BR)DSS
Parameter
drain-source breakdown
voltage
Conditions
I
D
= 0.25 mA; V
GS
= 0 V
T
j
= 25
°C
T
j
=
−55 °C
V
GS(th)
gate-source threshold voltage I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
T
j
= 25
°C
T
j
= 175
°C
T
j
=
−55 °C
I
DSS
drain-source leakage current
V
DS
= 55 V; V
GS
= 0 V
T
j
= 25
°C
T
j
= 175
°C
I
GSS
R
DSon
gate-source leakage current
drain-source on-state
resistance
V
GS
=
±20
V; V
DS
= 0 V
V
GS
= 10 V; I
D
= 25 A;
Figure 7
and
8
T
j
= 25
°C
T
j
= 175
°C
Dynamic characteristics
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
L
d
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
turn-off delay time
fall time
internal drain inductance
from drain lead 6mm from
package to centre of die
from contact screw on
mounting base to centre of
die SOT78
from upper edge of drain
mounting base to centre of
die SOT404
L
s
internal source inductance
from source lead to source
bond pad
V
DD
= 30 V; R
L
= 1.2
Ω;
V
GS
= 10 V; R
G
= 10
Ω;
V
GS
= 0 V; V
DS
= 25 V;
f = 1 MHz;
Figure 12
−
−
−
−
−
−
−
−
−
980
240
150
11
56
38
31
4.5
3.5
1310
290
210
−
−
−
−
−
−
pF
pF
pF
ns
ns
ns
ns
nH
nH
−
−
20
−
24
48
mΩ
mΩ
−
−
−
0.05
−
2
10
500
100
µA
µA
nA
2
1
−
3
−
−
4
−
4.4
V
V
V
55
50
−
−
−
−
V
V
Min
Typ
Max
Unit
Static characteristics
−
2.5
−
nH
−
7.5
−
nH
9397 750 07641
© Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 01 — 25 October 2000
5 of 15
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