74ACT10
TRIPLE 3-INPUT NAND GATE
PRELIMINARY DATA
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 6.5 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
µA
(MAX.) at T
A
= 25
o
C
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN), V
IL
= 0.8V (MAX)
50Ω TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 10
IMPROVED LATCH-UP IMMUNITY
B
M
(Plastic Package)
(Micro Package)
ORDER CODES :
74ACT10B
74ACT10M
operation similar to equivalent Bipolar Schottky
TTL.
The internal circuit is composed of 3 stages
including buffer output, which enables high noise
immunity and stable output.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The ACT10 is an advanced high-speed CMOS
TRIPLE 3-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power applications mantaining high speed
PIN CONNECTION AND IEC LOGIC SYMBOLS
May 1997
1/7
74ACT10
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 3, 9
2, 4, 10
13, 5, 11
12, 6, 8
7
14
SYMBOL
1A to 3A
1B to 3B
1C to 3C
1Y to 3Y
GND
V
CC
NAME AND F UNCTIO N
Data Inputs
Data Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
L
X
X
H
B
X
L
X
H
C
X
X
L
H
Y
H
H
H
L
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
T
stg
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Storage Temperature
Lead Temperature (10 sec)
Parameter
Value
-0.5 to +7
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±
20
±
20
±
50
±
150
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
o
o
I
CC
or I
GND
DC V
CC
or Ground Current
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
dt/dv
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature:
Input Rise and Fall Time V
CC
= 4.5 to 5.5V (note 1)
Parameter
Valu e
4.5 to 5.5
0 to V
CC
0 to V
CC
-40 to +85
8
Unit
V
V
V
o
C
ns/V
1) V
IN
from 0.8 V to 2.0 V
2/7
74ACT10
DC SPECIFICATIONS
Symbol
Parameter
V
CC
(V)
V
IH
V
IL
V
OH
High Level Input Voltage
Low Level Input Voltage
High Level Output
Voltage
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Low Level Output
Voltage
4.5
5.5
4.5
5.5
I
I
I
CCT
I
CC
I
OLD
I
OHD
Input Leakage Current
Max I
CC
/Input
Quiescent Supply
Current
Dynamic Output Current
(note 1, 2)
5.5
5.5
5.5
5.5
V
I
=
V
IH
or
V
IL
(*)
Test Con dition s
o
Value
T
A
= 25 C
Min.
Typ.
1.5
1.5
1.5
1.5
4.4
5.4
3.86
4.86
0.001
0.001
0.1
0.1
0.36
0.36
±0.1
0.6
4
4.49
5.49
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
±1
1.5
40
75
-75
Max.
-40 to 85 C
Min .
2.0
2.0
0.8
0.8
Max.
o
Unit
V
O
= 0.1 V or
V
CC
- 0.1 V
V
O
= 0.1 V or
V
CC
- 0.1 V
V
I
=
V
IH
or
V
IL
(*)
2.0
2.0
V
V
V
I
O
=-50
µA
I
O
=-50
µA
I
O
=-24 mA
I
O
=-24 mA
I
O
=50
µA
I
O
=50 mA
I
O
=24 mA
I
O
=24 mA
V
V
I
= V
CC
or GND
V
I
= V
CC
-2.1 V
V
I
= V
CC
or GND
V
OLD
= 1.65 V max
V
OHD
= 3.85 V min
µA
mA
µA
mA
mA
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50
Ω.
(*) All outputs loaded.
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, R
L
= 500
Ω,
Input t
r
= t
f
=3 ns)
Symbol
Parameter
V
CC
(V)
t
PLH
t
PHL
Propagation Delay Time
5.0
(*)
T est Cond ition
Value
o
-40 to 85 C
T
A
= 25 C
Min. Typ. Max. Min . Max.
o
Unit
1.5
6.5
9.0
1.0
9.5
ns
(*) Voltage range is 5V
±
0.5V
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
V
CC
(V)
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance (note 1)
5.0
5.0
Test Con dition s
o
Value
T
A
= 25 C
Min.
Typ.
4.5
25
Max.
-40 to 85 C
Min .
Max.
o
Unit
pF
pF
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to
Test Circuit). Average operating current can be obtained by the following equation. I
CC
(opr) = C
PD
•
V
CC
•
f
IN
+ I
CC
/n (per circuit)
3/7
74ACT10
TEST CIRCUIT
C
L
= 50 pF or equivalent (includes jig and probe capacitance)
R
L
= R
1
= 500Ω or equivalent
R
T
=Z
OUT
of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAYS
(f=1MHz; 50% duty cycle)
4/7
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
