REVISIONS
LTR
A
B
DESCRIPTION
Added Appendix B to allow for the procurement of die. - glg
Changed Table I parameters; tAW, tPWE, tSCE, and tWH, all from
40 ns to 45 ns. ksr
C
D
Boilerplate update and part of five year review. tcr
Added new footnote 3/ to Table IA and renumbered the existing
footnotes. ksr
06-02-24
08-04-08
Raymond Monnin
Robert M. Heber
DATE (YR-MO-DAY)
00-10-13
01-02-27
APPROVED
Raymond Monnin
Raymond Monnin
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
D
35
D
15
D
36
D
16
D
37
D
17
D
38
D
18
REV
D
39
D
19
D
20
D
21
D
1
D
22
D
2
D
23
D
3
D
24
D
4
D
25
D
5
D
26
D
6
D
27
D
7
D
28
D
8
D
29
D
9
D
30
D
10
D
31
D
11
D
32
D
12
D
33
D
13
D
34
D
14
SHEET
PREPARED BY
Gary L. Gross
CHECKED BY
Jeff Bowling
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY All
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
APPROVED BY
Michael. A. Frye
MICROCIRCUIT, MEMORY, DIGITAL, CMOS
4K X 8/9 RADIATION-HARDENED DUAL-PORT
STATIC RANDOM ACCESS MEMORY (SRAM),
MONOLITHIC SILICON
DRAWING APPROVAL DATE
96-07-30
REVISION LEVEL
D
SIZE
A
SHEET
CAGE CODE
67268
1 OF
39
5962-96845
5962-E235-08
DSCC FORM 2233
APR 97
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)
and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
|
|
|
Federal
stock class
designator
\
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
02
03
04
Generic number 1/
7C138C45
7C139C45
7C138C55
7C139C55
Circuit function
Data retention
Yes
Yes
Yes
Yes
Access time
45 ns
45 ns
55 ns
55 ns
-
|
|
|
RHA
designator
(see 1.2.1)
/
96845
01
|
|
|
Device
type
(see 1.2.2)
M
|
|
|
Device
class
designator
(see 1.2.3)
X
|
|
|
Case
outline
(see 1.2.4)
X
|
|
|
Lead
finish
(see 1.2.5)
4K X 8 Dual port SRAM
4K X 9 Dual port SRAM
4K X 8 Dual port SRAM
4K X 9 Dual port SRAM
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
M
Q or V
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN
class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
Descriptive designator
See figure 1
See figure 1
Terminals
68
68
Package style
Pin grid array
Quad flat pack
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or
MIL-PRF-38535, appendix A for device class M.
__________
1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this
document and will also be listed in MIL-HDBK-103 (see 6.6.2 herein).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
D
5962-96845
SHEET
2
1.3 Absolute maximum ratings. 2/ 3/
Supply voltage range (V
CC
).........................................
Storage temperature range ........................................
Short circuit output current .........................................
Maximum power dissipation (P
D
)................................
Lead temperature (soldering, 10 seconds) .................
Thermal resistance, junction-to-case (θ
JC
) .................
Maximum junction temperature (T
J
) ...........................
DC input voltage range...............................................
DC output voltage range.............................................
Output voltage applied in high Z state ........................
1.4 Recommended operating conditions.
Supply voltage range (V
CC
).........................................
High level input voltage range (V
IH
) ............................
Low level input voltage range (V
IL
) .............................
Case operating temperature range (T
C
) .....................
1.5 Digital logic testing for device classes Q and V.
Fault coverage measurement of manufacturing
logic tests (MIL-STD-883, method 5012) ....................... 100 percent
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103
MIL-HDBK-780
- List of Standard Microcircuit Drawings.
- Standard Microcircuit Drawings.
4.5 V dc minimum to 5.5 V dc maximum
0.7 V
CC
to 6.0 V dc
-0.5 V dc to +0.3 V
CC
-55°C to +125°C
-0.5 V dc to +7.0 V dc
-65°C to +150°C
90 mA
2.0 W
+260°C
3.3°C/W 4/
+175°C 5/
-0.5 V dc to V
CC
+ 0.5 V dc 6/
-0.5 V dc to V
CC
+ 0.5 V dc 6/
-0.5 V dc to V
CC
+ 0.5 V dc
(Copies of these documents are available online at
http://assist.daps.dla.mil/quicksearch/
or
http://assist.daps.dla.mil
or from the
Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
___________
2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
3/ All voltages referenced to GND unless otherwise specified.
4/ Measured per MIL-STD-883, Method 1012, infinite heat sink.
5/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening
conditions in accordance with method 5004 of MIL-STD-883.
6/ Negative undershoots to a minimum of -3.0 V are allowed with a maximum of 20 ns pulse width.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
D
5962-96845
SHEET
3
2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM Standard F1192-00
-
Standard Guide for the Measurement of Single Event Phenomena Induced by
Heavy Ion Irradiation of Semiconductor Devices.
(Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor
Drive, West Conshohocken, PA 19428-2959;
http://www.astm.org.)
ELECTRONICS INDUSTRIES ASSOCIATION (EIA)
JEDEC Standard EIA/JESD 78
-
IC Latch-Up Test.
(Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA
22201;
http://www.jedec.org.)
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute
the documents. These documents also may be available in or through libraries or other informational services.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-
38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in
the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M
shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device
class M.
3.2.1 Case outlines. The case outlines shall be in accordance with figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Truth table. The truth table shall be as specified on figure 3.
3.2.4 AC test circuit and waveforms. The ac test circuit and waveforms shall be as specified on figure 4.
3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as specified on figure 5.
3.2.6 Functional tests. Various functional tests used to test this device are contained in the appendix. If the test patterns
cannot be implemented due to test equipment limitations, alternate test patterns to accomplish the same results shall be allowed.
For device class M, alternate test patterns shall be maintained under document revision level control by the manufacturer and
shall be made available to the preparing or acquiring activity upon request. For device classes Q and V alternate test patterns
shall be under the control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and
shall be made available to the preparing or acquiring activity upon request.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
D
5962-96845
SHEET
4
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table I.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be
in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required
in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and
herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in
MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to
this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 41 (see MIL-PRF-38535, appendix A).
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
b.
Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in)
electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.
The test circuit shall be maintained by the manufacturer under document revision level control and shall be made
available to the preparing or acquiring activity upon request. For device class M, the test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015.
(1) Dynamic burn-in for device class M (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
D
5962-96845
SHEET
5
NXP MCU
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