INTEGRATED CIRCUITS
74LVT126
3.3V Quad buffer (3-State)
Product specification
Supersedes data of 1995 Dec 21
IC23 Data Handbook
1998 Feb 19
Philips
Semiconductors
Philips Semiconductors
Product specification
3.3V Quad buffer (3-State)
74LVT126
FEATURES
•
Quad bus interface
•
3-State buffers
•
Output capability: +64mA/-32mA
•
TTL input and output switching levels
•
Input and output interface capability to systems at 5V supply
•
Bus-hold data inputs eliminate the need for external pull-up
•
Live insertion/extraction permitted
•
No bus current loading when output is tied to 5V bus
•
Power-up 3-State
•
Latch-up protection exceeds 500mA per JEDEC Std 17
•
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
resistors to hold unused inputs
DESCRIPTION
The LVT126 is a high-performance BiCMOS product designed for
V
CC
operation at 3.3V.
This device combines low static and dynamic power dissipation with
high speed and high output drive.
The 74LVT126 device is a quad buffer that is ideal for driving bus
lines. The device features four Output Enables (OE0, OE1, OE2,
OE3), each controlling one of the 3-State outputs.
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
OUT
I
CCZ
PARAMETER
Propagation delay
An to Yn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
T
amb
= 25°C; GND = 0V
C
L
= 50pF; V
CC
= 3.3V
V
I
= 0V or V
CC
Outputs disabled; V
O
= 0V or 3.0V
Outputs disabled; V
CC
= 3.6V
TYPICAL
2.3
2.4
4
8
0.13
UNIT
ns
pF
pF
mA
ORDERING INFORMATION
PACKAGES
14-Pin Plastic SO
14-Pin Plastic SSOP
14-Pin Plastic TSSOP
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74LVT126 D
74LVT126 DB
74LVT126 PW
NORTH AMERICA
74LVT126 D
74LVT126 DB
74LVT126PW DH
DWG NUMBER
SOT108-1
SOT337-1
SOT402-1
PIN DESCRIPTION
PIN NUMBER
2, 5, 9, 12
3, 6, 8, 11
1, 4, 10, 13
7
14
SYMBOL
A0 – A3
Y0 – Y3
OE0 – OE3
GND
V
CC
Data inputs
Data outputs
Output enable inputs
Ground (0V)
Positive supply voltage
NAME AND FUNCTION
PIN CONFIGURATION
LOGIC SYMBOL
1
OE0
2
4
OE1
A1
5
10
OE2
A2
9
13
OE3
A3
12
11
Y3
8
Y2
6
Y1
3
Y0
OE0
A0
Y0
OE1
A1
Y1
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
OE3
A3
Y3
OE2
A2
Y2
A0
SA00031
SV00093
1998 Feb 19
2
853-1822 18991
Philips Semiconductors
Product specification
3.3V Quad buffer (3-State)
74LVT126
LOGIC SYMBOL (IEEE/IEC)
FUNCTION TABLE
INPUTS
OUTPUTS
An
L
H
X
Yn
L
H
Z
OEn
1
2
4
5
10
9
13
12
EN
1
3
H
H
L
6
8
11
H
L
X
Z
= High voltage level
= Low voltage level
= Don’t care
= High impedance ”off ” state
SV00134
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
V
I
V
OUT
I
O
OUT
I
IK
I
OK
T
stg
PARAMETER
DC supply voltage
DC input voltage
3
DC output voltage
3
DC output current
Out in High State
DC input diode current
DC output diode current
Storage temperature range
V
I
< 0
V
O
< 0
–64
–50
–50
–65 to 150
mA
mA
mA
°C
Output in Off or High state
Output in Low state
CONDITIONS
RATING
–0.5 to +4.6
–0.5 to +7.0
–0.5 to +7.0
128
UNIT
V
V
V
mA
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
MIN
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Low-level output current; current duty cycle
≤
50%, f
≥
1kHz
Input transition rise or fall rate; outputs enabled
Operating free-air temperature range
–40
2.7
0
2.0
0.8
–32
32
mA
64
10
+85
ns/V
°C
LIMITS
MAX
3.6
5.5
V
V
V
V
mA
UNIT
1998 Feb 19
3
Philips Semiconductors
Product specification
3.3V Quad buffer (3-State)
74LVT126
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
V
IK
V
OH
PARAMETER
Input clamp voltage
High-level output voltage
TEST CONDITIONS
V
CC
= 2.7V; I
IK
= –18mA
V
CC
= 2.7 to 3.6V; I
OH
= –100µA
V
CC
= 2.7V; I
OH
= –8mA
V
CC
= 3.0V; I
OH
= –32mA
V
CC
= 2.7V; I
OL
= 100µA
V
CC
= 2.7V; I
OL
= 24mA
V
OL
Low-level output voltage
V
CC
= 3.0V; I
OL
= 16mA
V
CC
= 3.0V; I
OL
= 32mA
V
CC
= 3.0V; I
OL
= 64mA
V
CC
= 0 or 3.6V; V
I
= 5.5V
I
I
Input leakage current
In ut
V
CC
= 3.6V; V
I
= V
CC
or GND
V
CC
= 3.6V; V
I
= V
CC
V
CC
= 3.6V; V
I
= 0
I
OFF
I
HOLD
Output off current
Bus Hold current A
inputs
6
V
CC
= 0V; V
I
or V
O
= 0 to 4.5V
V
CC
= 3V; V
I
= 0.8V
V
CC
= 3V; V
I
= 2.0V
V
CC
= 0V to 3.6V; V
CC
= 3.6V
I
EX
I
PU/PD
I
OZH
I
OZL
I
CCH
I
CCL
I
CCZ
∆I
CC
Additional supply current per
input pin
2
Quiescent supply current
Current into an output in the
High state when V
O
> V
CC
Power up/down 3-State
output current
3
3-State output high current
3-State output low current
V
O
= 5.5V; V
CC
= 3.0V
V
CC
≤
1.2V; V
O
= 0.5V to V
CC
; V
I
= GND or V
CC
;
OE/OE = Don’t care
V
CC
= 3.6V; V
O
= 3.0V
V
CC
= 3.6V; V
O
= 0.5V
V
CC
= 3.6V; Outputs High, V
I
= GND or V
CC,
I
O =
0
V
CC
= 3.6V; Outputs Low, V
I
= GND or V
CC,
I
O =
0
V
CC
= 3.6V; Outputs Disabled; V
I
= GND or V
CC,
I
O =
V
CC
= 3V to 3.6V; One input at V
CC
-0.6V,
Other inputs at V
CC
or GND
0
5
75
–75
±500
60
±1
1
–1
0.13
2
0.13
0.1
125
±100
5
–5
0.19
7
0.19
0.2
mA
mA
µA
µA
µA
µA
All inputs
Control pins
Data pins
4
ins
V
CC
-0.2
2.4
2.0
Temp = -40°C to +85°C
MIN
TYP
1
–0.9
V
CC
-0.1
2.5
2.2
0.1
0.3
0.25
0.3
0.4
1
±0.1
0.1
–1
1
150
–150
µA
0.2
0.5
0.4
0.5
0.55
10
±1
1
-5
±100
µA
µA
V
V
MAX
–1.2
V
UNIT
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25°C.
2. This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND
3. This parameter is valid for any V
CC
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
= 1.2V to V
CC
= 3.3V
±
0.3V a
transition time of 100µsec is permitted. This parameter is valid for T
amb
= 25°C only.
4. Unused pins at V
CC
or GND.
5. I
CCZ
is measured with outputs pulled up to V
CC
or down to GND.
6. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500Ω, T
amb
= –40°C to +85°C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
MIN
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
An to Yn
Output enable time
OEn to Yn
Output disable time
OEn to Yn
1
2
2
1.0
1.0
1.0
1.1
1.0
1.3
V
CC
= 3.3V
±0.3V
TYP
1
2.3
2.4
3.6
3.6
2.2
3.6
MAX
3.8
3.9
5.4
5.2
3.8
5.5
V
CC
= 2.7V
MAX
4.5
4.4
6.1
5.8
4.3
6.1
ns
ns
ns
UNIT
NOTE:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25°C.
1998 Feb 19
4
Philips Semiconductors
Product specification
3.3V Quad buffer (3-State)
74LVT126
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
3V
OE INPUT
1.5V
INPUT
0V
t
PLH
t
PHL
V
OH
1.5V
OUTPUT
V
OL
1.5V
t
PZH
t
PHZ
V
OH
V
OH
– 0.3V
Yn OUTPUT
V
M
0V
Yn OUTPUT
t
PZL
t
PLZ
3.5V
1.5V
V
M
V
M
V
M
V
OL
+ 0.3V
V
OL
SA00028
Waveform 1. Input (An) to Output (Yn) Propagation Delays
SV00094
Waveform 2. 3-State Output Enable and Disable Times
TEST CIRCUIT AND WAVEFORMS
V
CC
6.0V
Open
V
IN
PULSE
GENERATOR
R
T
D.U.T.
C
L
R
L
t
THL
(t
F
)
t
TLH
(t
R
)
V
OUT
R
L
GND
t
W
V
M
10%
10%
0V
t
TLH
(t
R
)
t
THL
(t
F
)
90%
V
M
10%
t
W
0V
AMP (V)
V
M
AMP (V)
90%
NEGATIVE
PULSE
90%
Test Circuit for 3-State Outputs
90%
POSITIVE
PULSE
10%
V
M
SWITCH POSITION
TEST
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
SWITCH
Open
6V
GND
V
M
= 1.5V
Input Pulse Definition
DEFINITIONS
R
L
= Load resistor; see AC CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude
74LVT
2.7V
Rep. Rate
v10MHz
t
W
t
R
t
F
500ns
v2.5ns v2.5ns
SV00092
1998 Feb 19
5
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