INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT240
Octal buffer/line driver; 3-state;
inverting
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state;
inverting
FEATURES
•
Output capability: bus driver
•
I
CC
category: MSI
GENERAL DESCRIPTION
74HC/HCT240
The 74HC/HCT240 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT240 are octal inverting buffer/line drivers
with 3-state outputs. The 3-state outputs are controlled by
the output enable inputs 1OE and 2OE. A HIGH on nOE
causes the outputs to assume a high impedance
OFF-state. The “240” is identical to the “244” but has
inverting outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
TYPICAL
SYMBOL
t
PHL/
t
PLH
PARAMETER
propagation delay
1A
n
to 1Y
n
;
2A
n
to 2Y
n
input capacitance
power dissipation capacitance per buffer
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V
9
9
HCT
ns
UNIT
C
I
C
PD
Notes
3.5
30
3.5
30
pF
pF
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state; inverting
PIN DESCRIPTION
PIN NO.
1
2, 4, 6, 8
3, 5, 7, 9
10
17, 15, 13, 11
18, 16, 14, 12
19
20
SYMBOL
1OE
1A
0
to 1A
3
2Y
0
to 2Y
3
GND
2A
0
to 2A
3
1Y
0
to 1Y
3
2OE
V
CC
NAME AND FUNCTION
output enable input (active LOW)
data inputs
bus outputs
ground (0 V)
data inputs
bus outputs
output enable input (active LOW)
positive supply voltage
74HC/HCT240
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state; inverting
FUNCTION TABLE
INPUTS
nOE
L
L
H
Notes
L
H
X
nA
n
74HC/HCT240
OUTPUT
nY
n
H
L
Z
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
Fig.4 Functional diagram.
December 1990
4
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state; inverting
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HC
SYMBOL
PARAMETER
74HC/HCT240
TEST CONDITIONS
V
CC
WAVEFORMS
(V)
ns
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Fig.5
+25
min.
typ.
−40
to
+85
max.
min.
−40
to
+125
min. max.
max.
125
25
21
190
38
33
190
38
33
75
15
13
t
PHL
/ t
PLH
propagation delay
1A
n
to 1Y
n
;
2A
n
to 2Y
n
t
PZH
/ t
PZL
3-state output enable time
1OE to 1Y
n
;
2OE to 2Y
n
t
PHZ
/ t
PLZ
3-state output disable time
1OE to 1Y
n
;
2OE to 2Y
n
t
THL
/ t
TLH
output transition time
30
11
9
39
14
11
41
15
12
14
5
4
100
20
17
150
30
26
150
30
26
60
12
10
150
30
26
225
45
38
225
45
38
90
18
15
ns
Fig.6
ns
Fig.6
ns
Fig.5
December 1990
5