Philips Semiconductors
Product specification
Dual retriggerable monostable
multivibrator with reset
FEATURES
•
DC triggered from active HIGH or
active LOW inputs
•
Retriggerable for very long pulses
up to 100% duty factor
•
Direct reset terminates output
pulse
•
Schmitt-trigger action on all inputs
except for the reset input
•
Output capability: standard (except
for nR
EXT
/C
EXT
)
•
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT123 are high-speed
Si-gate CMOS devices and are pin
compatible with low power Schottky
TTL (LSTTL). They are specified in
compliance with JEDEC standard no.
7A.
The 74HC/HCT123 are dual
retriggerable monostable
multivibrators with output pulse width
control by three methods. The basic
pulse time is programmed by
selection of an external resistor
(R
EXT
) and capacitor (C
EXT
). The
external resistor and capacitor are
normally connected as shown in
Fig.6.
Once triggered, the basic output
pulse width may be extended by
retriggering the gated active
LOW-going edge input (nA) or the
active HIGH-going edge input (nB).
By repeating this process, the output
pulse period (nQ = HIGH, nQ = LOW)
can be made as long as desired.
Alternatively an output delay can be
terminated at any time by a
LOW-going edge on input nR
D
, which
also inhibits the triggering.
An internal connection from nR
D
to
the input gates makes it possible to
trigger the circuit by a positive-going
signal at input nR
D
as shown in the
function table. Figures 7 and 8
illustrate pulse control by retriggering
1998 Jul 08
2
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
and early reset. The basic output
pulse width is essentially determined
by the values of the external timing
components R
EXT
and C
EXT
. For
pulse widths, when C
EXT
<
10 000 pF,
see Fig.9.
When C
EXT
>
10 000 pF, the typical
output pulse width is defined as:
t
W
= 0.45
×
R
EXT
×
C
EXT
(typ.),
74HC/HCT123
where:
t
W
= pulse width in ns;
R
EXT
= external resistor in kΩ;
C
EXT
= external capacitor in pF.
Schmitt-trigger action in the nA and
nB inputs, makes the circuit highly
tolerant to slower input rise and fall
times.
The ‘123’ is identical to the ‘423’ but
can be triggered via the reset input.
TYPICAL
SYMBOL
t
PHL
/ t
PLH
PARAMETER
propagation delay
nA, nB to nQ, nQ
nR
D
to nQ, nQ
C
I
C
PD
input capacitance
power dissipation
capacitance per
monostable
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF;
V
CC
= 5 V;
R
EXT
= 5 kΩ;
C
EXT
= 0 pF
26
20
3.5
54
HCT
26
23
3.5
56
ns
ns
pF
pF
UNIT
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+
∑(C
L
×
V
CC2
×
f
o
) + 0.75
×
C
EXT
×
V
CC2
×
f
o
+
D
×
16
×
V
CC
where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
D = duty factor in %
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
C
EXT
= timing capacitance in pF
∑
(C
L
×
V
CC2
×
f
o
) sum of outputs
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
Philips Semiconductors
Product specification
Dual retriggerable monostable
multivibrator with reset
ORDERING INFORMATION
TYPE
NUMBER
74HC123N;
74HCT123N
74HC123D;
74HCT123D
74HC123DB;
74HCT123DB
74HC123PW;
74HCT123PW
PACKAGE
NAME
DIP16
SO16
SSOP16
TSSOP16
DESCRIPTION
plastic dual in-line package; 16 leads (300 mil); long body
plastic small outline package; 16 leads; body width 3.9 mm
74HC/HCT123
VERSION
SOT38-1
SOT109-1
SOT338-1
SOT403-1
plastic shrink small outline package; 16 leads; body width 5.3 mm
plastic thin shrink small outline package; 16 leads; body width 4.4 mm
PIN DESCRIPTION
PIN NO.
1, 9
2, 10
3, 11
4, 12
7
8
13, 5
14, 6
15
16
1A, 2A
1B, 2B
1R
D
, 2R
D
1Q, 2Q
2R
EXT
/C
EXT
GND
1Q, 2Q
1C
EXT
, 2C
EXT
1R
EXT
/C
EXT
V
CC
SYMBOL
NAME AND FUNCTION
trigger inputs (negative-edge triggered)
trigger inputs (positive-edge triggered)
direct reset LOW and trigger action at positive edge
outputs (active LOW)
external resistor/capacitor connection
ground (0 V)
outputs (active HIGH)
external capacitor connection
external resistor/capacitor connection
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
1998 Jul 08
3
Philips Semiconductors
Product specification
Dual retriggerable monostable
multivibrator with reset
FUNCTION TABLE
INPUTS
nR
D
L
X
X
H
H
↑
Note
1. If the monostable was triggered
before this condition was
established, the pulse will
continue as programmed.
nA
X
H
X
L
↓
L
nB
X
X
L
↑
H
H
L
L
(1)
L
(1)
OUTPUTS
nQ
nQ
H
H
(1)
H
(1)
H
L
X
↑
↓
74HC/HCT123
= HIGH voltage level
= LOW voltage level
= don’t care
= LOW-to-HIGH transition
= HIGH-to-LOW transition
= one HIGH level output pulse
= one LOW level output pulse
Fig.4 Functional diagram.
(1) For minimum noise generation,
it is recommended to ground pins 6 (2C
EXT
)
and 14 (1C
EXT
) externally to pin 8 (GND).
Fig.5 Logic diagram.
1998 Jul 08
4
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
