Freescale Semiconductor, Inc.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Document order number: MC33395/D
Rev 2.0, 01/2004
Advance Information
Three-Phase Gate Driver IC
The 33395 simplifies the design of high-power BLDC motor control design by
combining the gate drive, charge pump, current sense, and protection circuitry
necessary to drive a three-phase bridge configuration of six N-channel power
MOSFETs. Mode logic is incorporated to route a pulse width modulation (PWM)
signal to either the low-side MOSFETs or high-side MOSFETs of the bridge, or
to provide complementary PWM outputs to both the low- and high-sides of the
bridge.
33395
33395T
THREE-PHASE
GATE DRIVER IC
Freescale Semiconductor, Inc...
Detection and drive circuitry are also incorporated to control a reverse battery
protection high-side MOSFET switch. PWM frequencies up to 28 kHz are
possible. Built-in protection circuitry prevents damage to the MOSFET bridge as
well as the drive IC and includes overvoltage shutdown, overtemperature
shutdown, overcurrent shutdown, and undervoltage shutdown.
The device is parametrically specified over an ambient temperature range of
-40°C
≤
T
A
≤
125°C and 5.5 V
≤
V
IGN
≤
24 V supply.
Features
• Drives Six N-Channel Low R
DS(ON)
Power MOSFETs
• Built-In Charge Pump Circuitry
• Built-In Current Sense Comparator and Output Drive Current Limiting
• Built-In PWM Mode Control Logic
• Built-In Circuit Protection
• Designed for Fractional to Integral HP BLDC Motors
• 32-Terminal SOIC Wide Body Surface Mount Package
• 33395 Incorporates a <5.0
µs
Shoot-Through Suppression Timer
• 33395T Incorporates a <1.0
µs
Shoot-Through Suppression Timer
DWB SUFFIX
CASE 1324-02
32-TERMINAL SOICW
ORDERING INFORMATION
Device
MC33395DWB/R2
MC33395TDWB/R2
Temperature
Range (T
A
)
-40°C to 125°C
Package
32 SOICW
33395 Simplified Application Diagram
V
PWR
33395
V
DD
V
GDH
V
IGN
V
DD
CP
1H
CP
1L
CP
2H
CP
2L
C
RES
3
2
3
V
IGNP
GDH1
GDH2
GDH3
SRC1
SRC2
SRC3
N
S
N
H
S
H
H
MCU
HSE1–3
MODE0–1 GDL1
GDL2
PWM
LSE1–3 GDL3
-I
SENS
AGND
PGND
+I
SENS
V
DD
This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Motorola, Inc. 2004
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V
IGN
V
DD
Low
Low
Voltage
Reset
Reset
+I
SENS
Osc.
Charge
Charge
Pump
CP
1H
CP
1L
CP
2H
CP
2L
CP
RES
+
-
Drive Limiting
Drive Limiting
L
MODE0
MODE1
PWM
HSE1
HSE2
HSE3
LSE1
LSE2
LSE3
AGND
TEST
PGND
Overtemperature
Shutdown
Shutdown
Control
Control
Logic
Logic
H
V
GDH
V
IGNP
Gate
Drive
Gate
Circuits
Drive
Circuits
GDH1
GDH2
GDH3
SRC1
SRC2
SRC3
GDL1
GDL2
GDL3
Overvoltage
Overvoltage
Shutdown
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-I
SENS
Figure 1. 33395 Simplified Internal Block Diagram
33395
2
MOTOROLA ANALOG
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INTEGRATED CIRCUIT DEVICE DATA
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CP
2H
CP
RES
V
IGN
V
GDH
V
IGNP
SRC1
GDH1
GDL1
SRC2
GDH2
GDL2
SRC3
GDH3
GDL3
PGND
TEST
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
CP
2L
CP
1H
CP
1L
LSE1
LSE2
LSE3
HSE1
HSE2
HSE3
MODE0
MODE1
PWM
V
DD
AGND
+I
SENS
-I
SENS
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TERMINAL FUNCTION DESCRIPTION
Terminal
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Terminal Name
CP
2H
CP
RES
V
IGN
V
GDH
V
IGNP
SRC1
GDH1
GDL1
SRC2
GDH2
GDL2
SRC3
GDH3
GDL3
PGND
Test
-I
SENS
+I
SENS
AGND
V
DD
PWM
MODE1
MODE0
HSE3
Formal Name
Charge Pump Cap
Charge Pump Reserve Cap
Input Voltage
High-Side Gate Voltage
Input Voltage Protected
High-Side Sense
Gate Drive High
Output for Gate
High-Side Sense
Gate Drive High
Output for Gate
High-Side Sense
Gate Drive High
Gate Drive Low
Power Ground
Test Terminal
IS Minus
IS Plus
Analog Ground
Logic Supply Voltage
Pulse Width Modulator
Mode Control Bit 1
Mode Control Bit 0
High-Side Enable
Definition
High potential terminal connection for secondary charge pump capacitor
Input from external reservoir capacitor for charge pump
Input from ignition level supply voltage for power functions
Output full-time gate drive for auxiliary high-side power MOSFET switch
Input from protected ignition level supply for power functions
Sense for high-side source voltage, phase 1
Output for gate high-side, phase 1
Output for gate drive low-side, phase 1
Sense for high-side source voltage, phase 2
Output for gate high-side, phase 2
Output for gate drive low-side, phase 2
Sense for high-side source voltage, phase 3
Output for gate drive high-side, phase 3
Output for gate drive low-side, phase 3
Ground terminals for power functions
This should be connected to ground or left open
Inverting input for current limit comparator
Non-inverting input for current limit comparator
Ground terminal for logic functions
Supply voltage for logic functions
Input for pulse width modulated driver duty cycle
Input for mode control selection
Input for mode control selection
Input for high-side enable logic, phase 3
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TERMINAL FUNCTION DESCRIPTION (continued)
Terminal
25
26
27
28
29
30
31
32
Terminal Name
HSE2
HSE1
LSE3
LSE2
LSE1
CP
1L
CP
1H
CP
2L
Formal Name
High-Side Enable
High-Side Enable
Low-Side Enable
Low-Side Enable
Low-Side Enable
External Pump Capacitor
External Pump Capacitor
Charge Pump Capacitor
Definition
Input for high-side enable logic, phase 2
Input for high-side enable logic, phase 1
Input for low-side enable logic, phase 3
Input for low-side enable logic, phase 2
Input for low-side enable logic, phase 1
Input from external pump capacitor for charge pump and secondary terminals
Input from external pump capacitor for charge pump and secondary terminals
Input from external reservoir, external pump capacitors for charge pump, and
secondary terminals
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4
MOTOROLA ANALOG
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MAXIMUM RATINGS
All voltages are with respect to ground unless otherwise noted
Rating
V
IGN
Supply Voltage
V
IGNP
Load Dump Survival
V
DD
Logic Supply Voltage (Fail Safe)
Logic Input Voltage (LSEn, HSEn, PWM, and MODEn)
Start Up Current V
IGNP
ESD Voltage
Human Body Model
(Note 1)
V
ESD1
V
ESD2
T
STG
T
A
T
C
T
J
P
D
T
SOLDER
R
θ
JA
±500
±200
-65 to 160
-40 to 125
-40 to 125
150
1.5
240
65
°C
°C
°C
°C
W
°C
°C/W
V
Symbol
V
IGN
IGNPLD
Value
-15.5 to 40
-0.3 to 65
-0.3 to 7.0
0.3 to 7.0
100
Unit
VDC
VDC
VDC
VDC
mA
V
V
DD
V
IN
I
VIGNStartUp
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Machine Model
(Note 2)
Storage Temperature
Operating Ambient Temperature
Operating Case Temperature
Maximum Junction Temperature
Power Dissipation (T
A
= 25°C)
Terminal Soldering Temperature
Thermal Resistance, Junction-to-Ambient
Notes
1. ESD1 testing is performed in accordance with the Human Body Model (C
ZAP
= 100 pF, R
ZAP
= 1500
Ω).
2.
ESD2 testing is performed in accordance with the Machine Model (C
ZAP
= 200 pF, R
ZAP
= 0
Ω).
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
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