79LV2040
20 Megabit (512K x 40-Bit) Low
Low Voltage EEPROM MCM
Logic Diagram
Memory
F
EATURES
:
•
•
•
•
512k x 40-bit EEPROM MCM
R
AD
-P
AK
® radiation-hardened against natural
space radiation
Total dose hardness:
- >100 krad (Si)
- Dependent upon orbit
Excellent Single event effects
- SEL
TH
> 84 MeV/mg/cm
2
- SEU > 37 MeV/mg/cm
2
read mode
- SEU = 11.4 MeV/mg/cm
2
write mode
High endurance
- 10,000 cycles (Page Programming Mode)
- 10 year data retention
Page Write Mode: 128 Dword Page
High Speed:
- 200 and 250 ns maximum access times
Automatic programming
- 15 ms automatic Page/Dword write
Low power dissipation
- 100 mW/MHz active current
- 1.5 mW standby current
D
ESCRIPTION
:
Maxwell Technologies’ 79LV2040 multi-chip module (MCM)
memory features a greater than 100 krad (Si) total dose toler-
ance, dependent upon orbit. Using Maxwell Technologies’ pat-
ented radiation-hardened R
AD
-P
AK
® MCM packaging
technology, the 79LV2040 is the first radiation-hardened 8
megabit MCM EEPROM for space application. The 79LV2040
uses twenty 1 Megabit high speed CMOS die to yield a 20
megabit product. The 79LV2040 is capable of in-system elec-
trical byte and page programmability. It has a 128 x 40 page
programming function to make the erase and write operations
faster. It also features Data Polling and a Ready/Busy signal to
indicate the completion of erase and programming operations.
In the 79LV2040, hardware data protection is provided with
the RES pin, in addition to noise protection on the WE signal
and write inhibit on power on and off. Software data protection
is implemented using the JEDEC optional standard algorithm.
Maxwell Technologies' patented R
AD
-P
AK
® packaging technol-
ogy incorporates radiation shielding in the microcircuit pack-
age. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, R
AD
-P
AK
provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Maxwell Technologies self-defined Class
K
•
•
•
•
•
•
09.07.05 Rev 1
All data sheets are subject to change without notice
1
(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
©2005 Maxwell Technologies
All rights reserved.
20 Megabit (512K x 40-Bit) EEPROM MCM
79LV2040
T
ABLE
1. 79LV2040 A
BSOLUTE
M
AXIMUM
R
ATINGS
P
ARAMETER
Supply Voltage
Input Voltage
Package Weight
Operating Temperature Range
Storage Temperature Range
1. V
IN
min = -3.0V for pulse width <50ns.
S
YMBOL
V
CC
V
IN
RSP
T
OPR
T
STG
-55
-65
M
IN
-0.6
-0.5
1
35
125
150
T
YP
M
AX
7.0
7.0
U
NIT
V
V
Grams
°
C
°
C
T
ABLE
2. 79LV2040 R
ECOMMENDED
DC O
PERATING
C
ONDITIONS
P
ARAMETER
Supply Voltage
Input Voltage
RES_PIN
Operating Temperature Range
1. V
IL
min = -1.0V for pulse width < 50 ns
S
YMBOL
V
CC
V
IL
V
IH
V
H
T
OPR
M
IN
3.0
-0.3
1
2.2
V
CC
-0.5
-55
M
AX
3.6
0.8
V
CC
+0.3
V
CC
+1
125
U
NIT
V
V
V
V
°
C
Memory
T
ABLE
3. 79LV2040 D
ELTA
L
IMITS1
P
ARAMETER
I
CC1A
I
CC1B
I
CC2A
I
LI
- ADDR, CE, OE, WE
V
ARIATION2
+/- 10 %
+/- 10 %
+/- 10 %
+/- 10 %
I
LI
- D0-D39
+/- 10 %
1. Parameters are measured and recorded per MIL-STD-883 for Class K devices
2. Specified value in Table 5
09.07.05 Rev 1
All data sheets are subject to change without notice
3
©2005 Maxwell Technologies
All rights reserved
20 Megabit (512K x 40-Bit) EEPROM MCM
(V
CC
=3.3V ±10%, T
A
= -55
TO
+125°C)
P
ARAMETER
Address Access Time CE = OE = V
IL
, WE = V
IH
-200
-250
Chip Enable Access Time OE = V
IL
, WE = V
IH
-200
-250
Output Enable Access TIme CE = V
IL
, WE = V
IH
-200
-250
Output Hold to Address Change CE = OE =V
IL
, WE = V
IH
-200
-250
Output Disable to High-Z
2
CE = V
IL
, WE = V
IH
-200
-250
CE = OE = V
IL
, WE = V
IH
-200
-250
RES to Output Delay CE = OE = V
IL
, WE = V
IH3
-200
-250
S
YMBOL
t
ACC
S
UBGROUPS
9, 10, 11
--
--
t
CE
9, 10, 11
--
--
t
OE
9, 10, 11
0
0
t
OH
9, 10, 11
0
0
9, 10, 11
t
DF
0
0
t
DFR
0
0
t
RR
9, 10, 11
0
0
M
IN
79LV2040
M
AX
200
250
ns
200
250
ns
110
120
ns
--
--
ns
50
50
ns
300
350
ns
525
600
U
NIT
ns
T
ABLE
6. 79LV2040 AC E
LECTRICAL
C
HARACTERISTICS FOR
R
EAD
O
PERATION 1
Memory
1. Test conditions: input pulse levels = 0.4V to 2.4V; input rise and fall times < 20 ns; output load = 1 TTL gate + 100 pF (including
scope and jig); reference levels for measuring timing = 0.8 V/1.8 V.
2. t
DF
and t
DFR
are defined as the time at which the output becomes an open circuit and data is no longer driven.
3. Guaranteed by design.
T
ABLE
7. 79LV2040 AC E
LECTRICAL
C
HARACTERISTICS FOR
W
RITE
O
PERATION
(V
CC
= 3.3V ±10%, T
A
= -55
TO
+125°C)
P
ARAMETER
Address Setup Time
-150
-200
Chip Enable to Write Setup Time (WE controlled)
-150
-200
S
YMBOL
t
AS
S
UBGROUPS
9, 10, 11
0
0
t
CS
9, 10, 11
0
0
--
--
--
--
ns
M
IN 1
M
AX
U
NITS
ns
09.07.05 Rev 1
All data sheets are subject to change without notice
5
©2005 Maxwell Technologies
All rights reserved
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