Philips Semiconductors
Product specification
Octal inverting buffer (3-State)
74ABT240
FEATURES
•
Octal bus interface
•
3-State buffers
•
Output capability: +64mA/–32mA
•
Latch-up protection exceeds 500mA per Jedec Std 17
•
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT240 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT240 device is an octal inverting buffer that is ideal for
driving bus lines. The device features two Output Enables (1OE,
2OE), each controlling four of the 3-State outputs.
•
Power-up 3-State
•
Live insertion/extraction permitted
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
OUT
I
CCZ
PARAMETER
Propagation delay
nAx to nYx
Input capacitance
Output capacitance
Total supply current
CONDITIONS
T
amb
= 25°C; GND = 0V
C
L
= 50pF; V
CC
= 5V
V
I
= 0V or V
CC
Outputs disabled; V
O
= 0V or V
CC
Outputs disabled; V
CC
=5.5V
TYPICAL
3.1
4
7
50
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
20-Pin Plastic DIP
20-Pin plastic SO
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT240 N
74ABT240 D
74ABT240 DB
74ABT240 PW
NORTH AMERICA
74ABT240 N
74ABT240 D
74ABT240 DB
74ABT240PW DH
DWG NUMBER
SOT146-1
SOT163-1
SOT339-1
SOT360-1
PIN DESCRIPTION
PIN
NUMBER
2, 4, 6, 8
11, 13, 15,
17
18, 16, 14,
12
9, 7, 5, 3
1, 19
10
20
SYMBOL
1A0 – 1A3
2A0 – 2A3
1Y0 – 1Y3
2Y0 – 2Y3
1OE, 2OE
GND
V
CC
NAME AND FUNCTION
Data inputs
PIN CONFIGURATION
1OE
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
V
CC
2OE
1Y0
2A0
1Y1
2A1
1Y2
2A2
1Y3
2A3
Data inputs
Data outputs
Data outputs
Output enables
Ground (0V)
Positive supply voltage
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
GND 10
SA00034
1996 Sep 10
2
853–1608 17274
Philips Semiconductors
Product specification
Octal inverting buffer (3-State)
74ABT240
LOGIC SYMBOL
2 1A0
4
6
8
1A1
1A2
1A3
1Y0
1Y1
1Y2
1Y3
18
LOGIC SYMBOL (IEEE/IEC)
1
16
14
12
2
4
6
8
2Y0
2Y1
2Y2
2Y3
3
19
5
7
9
13
11
17
15
3
5
7
9
EN
18
16
14
12
EN
1 1OE
17
15
13
11
19
2A0
2A1
2A2
2A3
2OE
SA00035
SA00036
FUNCTION TABLE
INPUTS
1OE
L
L
H
H
L
X
Z
1An
L
H
X
2OE
L
L
H
2An
L
H
X
OUTPUTS
1Yn
H
L
Z
2Yn
H
L
Z
= High voltage level
= Low voltage level
= Don’t care
= High impedance ”off” state
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
Storage temperature range
V
O
< 0
output in Off or High state
output in Low state
V
I
< 0
CONDITIONS
RATING
–0.5 to +7.0
–18
–1.2 to +7.0
–50
–0.5 to +5.5
128
–65 to 150
UNIT
V
mA
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1996 Sep 10
3
Philips Semiconductors
Product specification
Octal inverting buffer (3-State)
74ABT240
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
High-level input voltage
Low-level Input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature range
0
–40
PARAMETER
Min
4.5
0
2.0
0.8
–32
64
10
+85
Max
5.5
V
CC
V
V
V
V
mA
mA
ns/V
°C
UNIT
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
Min
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
V
OL
I
I
I
OFF
I
PU
/I
PD
I
OZH
I
OZL
I
CEX
I
O
I
CCH
I
CCL
I
CCZ
∆I
CC
Additional supply current per
input pin
2
Quiescent supply current
Low-level output voltage
Input leakage current
Power-off leakage current
Power-up/down 3-state
output current
3
3-State output High current
3-State output Low current
Output High leakage current
Output current
1
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 0.0V; V
I
or V
O
≤
4.5V;
V
CC
= 2.1V; V
O
= 0.5V; V
I
= GND or V
CC
;
V
OE
= Don’t care
V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
V
CC
= 5.5V; V
O
= 2.5V
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs 3-State;
V
I
= GND or V
CC
Outputs 3-State, one input at 3.4V, other
inputs at V
CC
or GND; V
CC
= 5.5V
–50
2.5
3.0
2.0
Typ
–0.9
2.9
3.4
2.4
0.42
±0.01
±5.0
±5.0
5.0
–5.0
5.0
–100
50
24
50
0.5
0.55
±1.0
±100
±50
50
–50
50
–180
250
30
250
1.5
–50
Max
–1.2
2.5
3.0
2.0
0.55
±1.0
±100
±50
50
–50
50
–180
250
30
250
1.5
T
amb
= –40°C
to +85°C
Min
Max
–1.2
V
V
V
V
V
µA
µA
µA
µA
µA
µA
mA
µA
mA
µA
mA
UNIT
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This parameter is valid for any V
CC
between 0V and 2.1V, with a transition time of up to 10msec. From V
CC
= 2.1V to V
CC
5V
±
10% a
transition time of up to 100µsec is permitted.
1996 Sep 10
4
Philips Semiconductors
Product specification
Octal inverting buffer (3-State)
74ABT240
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500Ω
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Min
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
nAx to nYx
Output enable time
to High and Low level
Output disable time
from High and Low level
1
2
2
1.0
1.6
1.1
1.1
1.8
1.6
T
amb
= +25°C
V
CC
= +5.0V
Typ
2.7
3.5
3.1
4.2
3.7
3.0
Max
4.1
4.3
4.7
5.8
5.7
5.4
T
amb
= –40°C to +85°C
V
CC
= +5.0V
±0.5V
Min
1.0
1.6
1.1
1.1
1.8
1.6
Max
4.8
4.8
5.2
6.2
6.4
5.8
ns
ns
ns
UNIT
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
nOE INPUT
nAx INPUT
V
M
V
M
V
M
V
M
t
PZL
t
PLZ
3.5V
t
PHL
t
PLH
nYx OUTPUT
V
M
V
OL
+ 0.3V
V
OL
t
PHZ
V
OH
V
OH
– 0.3V
nYx OUTPUT
V
M
V
M
t
PZH
nYx OUTPUT
V
M
0V
SA00037
Waveform 1. Waveforms Showing the Input (nAx) to
Output (nYx) Propagation Delays
SA00017
Waveform 2. Waveforms Showing the 3-State Output
Enable and Disable Times
1996 Sep 10
5
Philips Semiconductors
Product specification
Octal inverting buffer (3-State)
74ABT240
TEST CIRCUIT AND WAVEFORMS
V
CC
7.0V
R
L
90%
NEGATIVE
PULSE
V
M
10%
t
THL
(t
F
)
C
L
R
L
POSITIVE
PULSE
10%
t
W
t
TLH
(t
R
)
90%
90%
V
M
10%
0V
10%
0V
t
TLH
(t
R
)
t
THL
(t
F
)
AMP (V)
t
W
V
M
90%
AMP (V)
PULSE
GENERATOR
V
IN
D.U.T.
R
T
V
OUT
Test Circuit for 3-State Outputs
V
M
SWITCH POSITION
TEST
t
PLZ
t
PZL
All other
SWITCH
closed
closed
open
V
M
= 1.5V
Input Pulse Definition
DEFINITIONS
R
L
= Load resistor; see AC CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude
74ABT
3.0V
Rep. Rate
1MHz
t
W
500ns
t
R
2.5ns
t
F
2.5ns
SA00012
1996 Sep 10
6
FPGA/CPLD
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