INTEGRATED CIRCUITS
74ABT125
Quad buffer (3-State)
Product specification
Supersedes data of 1996 Mar 05
IC23 Data Handbook
1998 Jan 16
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad buffer (3-State)
74ABT125
FEATURES
•
Quad bus interface
•
3-State buffers
•
Live insertion/extraction permitted
•
Output capability: +64mA/–32mA
•
Latch-up protection exceeds 500mA per Jedec Std 17
•
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74ABT125 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT125 device is a quad buffer that is ideal for driving bus
lines. The device features four Output Enables (OE0, OE1, OE2,
OE3), each controlling one of the 3-State outputs.
•
Power-up 3-State
•
Inputs are disabled during 3-State mode
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
OUT
I
CCZ
PARAMETER
Propagation delay
An to Yn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
T
amb
= 25°C; GND = 0V
C
L
= 50pF; V
CC
= 5V
V
I
= 0V or V
CC
Outputs disabled;
V
O
= 0V or V
CC
Outputs disabled; V
CC
=5.5V
TYPICAL
2.9
4
7
65
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
14-Pin Plastic DIP
14-Pin plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT125 N
74ABT125 D
74ABT125 DB
74ABT125 PW
NORTH AMERICA
74ABT125 N
74ABT125 D
74ABT125 DB
74ABT125PW DH
DWG NUMBER
SOT27-1
SOT108-1
SOT337-1
SOT402-1
PIN DESCRIPTION
PIN NUMBER
2, 5, 9, 12
3, 6, 8, 11
1, 4, 10, 13
7
14
SYMBOL
A0 – A3
Y0 – Y3
OE0 – OE3
GND
V
CC
Data inputs
Data outputs
Output enable inputs (active-Low)
Ground (0V)
Positive supply voltage
NAME AND FUNCTION
PIN CONFIGURATION
LOGIC SYMBOL
1
OE0
2
4
OE1
A1
5
10
6
Y1
3
Y0
OE0
A0
Y0
OE1
A1
Y1
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
OE3
A3
Y3
OE2
A2
Y2
A0
OE2
A2
9
13
OE3
12
11
Y3
8
Y2
SA00025
A3
SA00026
1998 Jan 16
2
853–1606 18868
Philips Semiconductors
Product specification
Quad buffer (3-State)
74ABT125
LOGIC SYMBOL (IEEE/IEC)
FUNCTION TABLE
INPUTS
OUTPUTS
An
L
H
X
Yn
L
H
Z
OEn
1
2
4
5
10
9
13
12
EN
1
3
L
L
H
6
8
11
H
L
X
Z
= High voltage level
= Low voltage level
= Don’t care
= High impedance ”off” state
SA00027
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
Storage temperature range
V
O
< 0
output in Off or High state
output in Low state
V
I
< 0
CONDITIONS
RATING
–0.5 to +7.0
–18
–1.2 to +7.0
–50
–0.5 to +5.5
128
–65 to 150
UNIT
V
mA
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature range
0
–40
PARAMETER
MIN
4.5
0
2.0
0.8
–32
64
10
+85
MAX
5.5
V
CC
V
V
V
V
mA
mA
ns/V
°C
UNIT
1998 Jan 16
3
Philips Semiconductors
Product specification
Quad buffer (3-State)
74ABT125
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
Min
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
OH
High–level output voltage
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
V
OL
I
I
I
OFF
I
PU
/I
PD
I
OZH
I
OZL
I
CEX
I
O
I
CCH
I
CCL
I
CCZ
Quiescent supply current
Low–level output voltage
Input leakage current
Power-off leakage current
Power-up/down 3-State
output current
3
3-State output High current
3-State output Low current
Output High leakage current
Output current
1
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 0.0V; V
O
or V
I
≤
4.5V
V
CC
= 2.1V; V
O
= 0.5V; V
I
GND or V
CC
;
V
OE
= Don’t care
V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
V
CC
= 5.5V; V
O
= 2.5V
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs 3–State;
V
I
= GND or V
CC
Outputs enabled, one data input at 3.4V,
other inputs at V
CC
or GND; V
CC
= 5.5V
∆I
CC
Additional supply current per
input pin
2
Outputs 3-State, one data input at 3.4V, other
inputs at V
CC
or GND; V
CC
= 5.5V
Outputs 3-State, one enable input at 3.4V,
other inputs at V
CC
or GND; V
CC
= 5.5V
–50
2.5
3.0
2.0
Typ
–0.9
2.9
3.4
2.4
0.35
±0.01
±5.0
±5.0
1.0
–1.0
5.0
–100
65
12
65
0.5
50
0.5
0.55
±1.0
±100
±50
50
–50
50
–180
250
15
250
1.5
250
1.5
–50
Max
–1.2
2.5
3.0
2.0
0.55
±1.0
±100
±50
50
–50
50
–180
250
30
50
1.5
250
1.5
T
amb
= –40°C
to +85°C
Min
Max
–1.2
V
V
V
V
V
µA
µA
µA
µA
µA
µA
mA
µA
mA
µA
mA
µA
mA
UNIT
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. This parameter is valid for any V
CC
between 0V and 2.1V, with a transition time of up to 10msec. From V
CC
= 2.1V to V
CC
= 5V
±
10% a
transition time of up to 100µsec is permitted.
AC CHARACTERISTICS
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF, R
L
= 500Ω
LIMITS
SYMBOL
PARAMETER
WAVEFORM
MIN
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
An to Yn
Output enable time
to High and Low level
Output disable time
from High and Low level
1
2
2
1.0
1.0
1.0
1.0
1.0
1.5
T
amb
= +25°C
V
CC
= +5.0V
TYP
2.8
3.1
3.2
4.2
4.1
2.8
MAX
4.1
4.6
5.0
6.2
5.4
5.0
T
amb
= –40°C to +85°C
V
CC
= +5.0V
±0.5V
MIN
1.0
1.0
1.0
1.0
1.0
1.5
MAX
4.6
4.9
5.9
6.8
6.2
5.5
ns
ns
ns
UNIT
1998 Jan 16
4
Philips Semiconductors
Product specification
Quad buffer (3-State)
74ABT125
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
3V
OE INPUT
1.5V
INPUT
0V
t
PLH
t
PHL
V
OH
1.5V
OUTPUT
V
OL
1.5V
t
PZH
t
PHZ
Yn OUTPUT
t
PZL
t
PLZ
3.5V
1.5V
V
M
V
M
V
M
V
OL
+ 0.3V
V
OL
V
OH
V
OH
– 0.3V
SA00028
Yn OUTPUT
Waveform 1. Waveforms Showing the Input (An) to
Output (Yn) Propagation Delays
V
M
0V
SA00029
Waveform 2. Waveforms Showing the 3-State
Output Enable and Disable Times
TEST CIRCUIT AND WAVEFORMS
7V
From Output
Under Test
C
L
= 50 pF
500
Ω
S1
Open
GND
500
Ω
Load Circuit
TEST
t
pd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
S1
open
7V
open
DEFINITIONS
Load capacitance includes jig and probe capacitance;
C
L
=
see AC CHARACTERISTICS for value.
SA00012
1998 Jan 16
5
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