SY56020XR
Low Voltage 1.2V/1.8V/2.5V CML 1:4 Fanout
Buffer 6.4Gbps with Equalization
General Description
The SY56020XR is a fully differential, low voltage
1.2V/1.8V/2.5V CML 1:4 Fanout Buffer with input
equalization.
The SY56020XR can process clock
signals as fast as 4.5GHz or data patterns up to
6.4Gbps.
The differential input includes Micrel’s unique 3-pin input
termination architecture that interfaces to DC-coupled
2.5V/3.3V LVPECL, 1.2V/1.8V/2.5V CML or LVDS
differential signals. For AC-coupled input applications,
an internal voltage reference is provided for input bias.
Input voltages as small as 200mV (400mV
pp
) are applied
before the 9, 18 or 27-inch FR4 transmission line. The
outputs are CML.
The SY56020XR operates from a 2.5V ±5% core supply
and a 1.2V, 1.8V or 2.5V ±5% output supply and is
guaranteed over the full industrial temperature range
(–40°C to +85°C). The SY56020XR is part of Micrel’s
®
high-speed, Precision Edge product line.
Data sheets and support documentation can be found
on Micrel’s web site at:
www.micrel.com.
Precision Edge
®
Features
•
1.2V/1.8V/2.5V CML 1:4 Fanout Bufer with EQ.
•
Guaranteed AC performance over temperature and
voltage:
– DC-to > 6.4Gbps throughput
– <300ps propagation delay (IN-to-Q)
– <15ps within-device skew
•
Ultra-low jitter design
– <0.8ps
RMS
random jitter
– <10ps
PP
deterministic jitter
•
High-speed CML outputs
•
2.5V ±5% , 1.8/1.2V ±5% power supply operation
•
Industrial temperature range: –40°C to +85°C
•
Available in 16-pin (3mm x 3mm) QFN package
Applications
•
•
•
•
Data Distribution
SONET clock and data distribution
Fibre Channel clock and data distribution
Gigabit Ethernet clock and data distribution
Functional Block Diagram
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
February 2010
M9999-020210-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY56020XR
Ordering Information
(1)
Part Number
SY56020XRMG
SY56020XRMGTR
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
(2)
Package
Type
QFN-16
QFN-16
Operating
Range
Industrial
Industrial
Package Marking
20XR with Pb-Free
bar-line indicator
20XR with Pb-Free
bar-line indicator
Lead
Finish
NiPdAu
Pb-Free
NiPdAu
Pb-Free
Pin Configuration
16-Pin QFN
February 2010
2
M9999-020210-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY56020XR
Pin Description
Pin Number
1,4
Pin Name
IN, /IN
Pin Function
Differential Input: Accepts differential signals as small as 200mV (400mV
PP
) applied
to the input of a 9, 18 or 27 inch 6mil FR4 stripline transmission line. See “Input and
Output Stage” section for details of this input.
Input Termination Center-Tap: Each side of the differential input pair terminates to
the VT pin. This pin provides a center-tap to a termination network for maximum
interface flexibility. An internal high impedance resistor divider biases VT to allow
input AC coupling. For AC coupling, bypass VT with 0.1µF low ESR capacitor to
VCC. See “Input Interface Applications” subsection and Figure 2a.
Three level input for equalization control.
Positive Power Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to
the V
CC
pin as possible. Supplies the input and core circuitry.
Output Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to the V
CCO
pin as possible. Supplies the output buffers.
Ground: Exposed pad must be connected to a ground plane that is the same
potential as the ground pins.
CML Differential Output Pair: Differential buffered copy of the input signal. The
output swing is typically 390mV. See “Functional Description” subsection for
termination information.
2
VT
3
13
8
5,16
15,14
12,11
10,9
7,6
EQ
VCC
VCCO
GND,
Exposed pad
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
Truth Table
EQ Input
LOW
FLOAT
HIGH
Equalization FR4 6mil Stripline
9“
18”
27”
February 2010
3
M9999-020210-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY56020XR
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
) ............................... –0.5V to +3.0V
Supply Voltage (V
CCO
) ............................. –0.5V to +3.0V
V
CC
-V
CCO
................................................................ <1.8V
V
CCO
-V
CC
............................................................... <0.5 V
Input Voltage (V
IN
) ............................. –0.5V to V
CC
+0.4V
CML Output Voltage (V
OUT
) ............................ 0.6V to 3V
Current (V
T
)
Source or sink on VT pin ............................. ±100mA
Input Current
Source or sink Current on (IN, /IN) ................ ±50mA
Maximum operating Junction Temperature .......... 125°C
Lead Temperature (soldering, 20sec.) .................. 260°C
Storage Temperature (T
s
) .................... –65°C to +150°C
Operating Ratings
(2)
Supply Voltage (V
CC
) .......................... 2.375V to 2.625V
(V
CCO
)………………..1.14V to 2.625V
Ambient Temperature (T
A
) ................... –40°C to +85°C
(3)
Package Thermal Resistance
QFN
Still-air (θ
JA
) ............................................ 75°C/W
Junction-to-board (ψ
JB
) ......................... 33°C/W
DC Electrical Characteristics
(4)
T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
CC
Parameter
Power Supply Voltage Range
Condition
V
CC
V
CCO
V
CCO
V
CCO
I
CC
I
CCO
R
DIFF_IN
V
IH
V
IL
V
IN
V
DIFF_IN
V
T_IN
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions
for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB.
ψ
JB
and
θ
JA
values are determined for a 4-layer board in still-air number, unless otherwise stated.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
5. V
IN
(max) is specified when V
T
is floating.
Min
2.375
1.14
1.7
2.375
Typ
2.5
1.2
1.8
2.5
70
64
Max
2.625
1.26
1.9
2.625
90
84
110
V
CC
+0.4
V
IH
–0.2
1.0
2.0
1.28
Units
V
V
V
V
mA
mA
Ω
V
V
V
V
V
Power Supply Current
Power Supply Current
Differential Input Resistance
(IN-to-/IN)
Input HIGH Voltage
(IN, /IN)
Input LOW Voltage
(IN, /IN)
Input Voltage Swing
(IN, /IN)
Differential Input Voltage Swing
(|IN - /IN|)
Voltage from Input to V
T
Max. V
CC
No Load. V
CCO
90
IN, /IN
IN, /IN
See Figure 3a, Note 5, applied to
input of transmission line.
See Figure 3b, Note 5, applied to
input of transmission line.
1.2
0
0.2
0.4
100
February 2010
4
M9999-020210-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY56020XR
CML Outputs DC Electrical Characteristics
(6)
V
CCO
= 1.14V to 1.26V R
L
= 50Ω
to V
CCO
.
V
CCO
= 1.7V to 1.9V, 2.375V to 2.625V, R
L
= 50Ω
to V
CCO
or 100Ω
across the outputs.
V
CC
= 2.375V to 2.625V; T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
OH
V
OUT
V
DIFF_OUT
R
OUT
Parameter
Output HIGH Voltage
Output Voltage Swing
Differential Output Voltage Swing
Output Source Impedance
Condition
R
L
= 50Ω
to V
CCO
See Figure 3a
See Figure 3b
Min
V
CC
-0.020
300
600
45
Typ
V
CC
-0.010
390
780
50
Max
V
CC
475
950
55
Units
V
mV
mV
Ω
Three Level EQ Input DC Electrical Characteristics
(6)
V
CC
= 2.375V to 2.625V; T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
V
IH
= V
CC
V
IL
= GND
-480
Condition
Min
V
CC
-0.3
0
Typ
Max
V
CC
V
EE
+0.3
400
Units
V
V
µA
µA
AC Electrical Characteristics
V
CCO
= 1.14V to 1.26V R
L
= 50Ω
to V
CCO
.
V
CCO
= 1.7V to 1.9V, 2.375V to 2.625V, R
L
= 50Ω
to V
CCO
or 100Ω
across the outputs.
V
CC
= 2.375V to 2.625V; T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
f
MAX
t
PD
t
Skew
t
Jitter
t
R
t
F
Parameter
Maximum Frequency
Propagation Delay (IN-to-Q)
Output-to-Output Skew
Part-to-Part Skew
Data Random Jitter
Data Deterministic Jitter
Output Rise/Fall Time
(20% to 80%)
Duty Cycle
Notes:
6.
7.
8.
9.
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Propagation delay is measured with no attenuating transmission line connected to the input.
Output-to-Output skew is the difference in time between both outputs under identical input transition, temperature and power supply
Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the
respective inputs.
Condition
NRZ Data
V
OUT
> 200mV (Clock)
Note 7, Figure 1
Note 8
Note 9
Note 10
Note 11
At full output swing.
Differential I/O
Min
6.4
4.5
120
Typ
Max
Units
Gbps
GHz
200
3
300
15
100
0.8
10
ps
ps
ps
ps
RMS
ps
PP
ps
%
30
45
60
100
55
10. Random jitter is additive jitter.
11. Deterministic jitter is measured with 2
23
–1 PRBS pattern.
February 2010
5
M9999-020210-A
hbwhelp@micrel.com
or (408) 955-1690
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