High Performance
128K×8
CMOS Flash EEPROM
5V 128K×8 CMOS Flash Memory
FEATURES
• Organization:131,072 words × 8 bits
• Sector Erase architecture
– Four 32K × 8 sectors
• Single 5.0±0.5V power supply
• High speed 70/90/120/150 ns address access time
• Low power consumption:
– 30 mA maximum read current
– 50 mA maximum program current
– 1.5 mA maximum standby current
– 1 mA maximum standby current (low power)
• Deep power-down: I
CC
< 2µA (AS29F011 version)
• 10,000 write/erase cycle endurance
– Data polling
– I/O6 toggle
• Low V
CC
write lock-out below 3.2V
• JEDEC standard packages and pinouts:
– 32-pin DIP
– 32-pin PLCC
– 32-pin TSOP
• JEDEC standard write cycle commands
– protects data from accidental changes
• Program/erase cycle end signals:
AS29F010
AS29F011
LOGIC BLOCK DIAGRAM
I/O
0
~I/O
7
V
CC
GND
PIN ARRANGEMENT
Pin
Description
address inputs
data input/output
chip enable
output enable
write enable
device ground
power supply
no connect
deep power down
(AS29F011 only)
TSOP
A11
A9
A8
A13
A14
NC*
WE
V
CC
NC
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
A[16:0]
I/O[7:1]
CE
OE
WE
GND
V
CC
NC
RP
Erase Voltage
Switch
State
Control
Command
Register
Program Voltage
Switch
Input/Output
Buffers
WE
AS29F010
Data
Latch
CE
OE
Chip Enable
Output Enable
Logic
PDIP
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
WE(W)
NC*
A14
A13
A8
A9
A11
OE
A10
CE(E)
I/O7
I/O6
I/O5
I/O4
I/O3
PLCC
A12
A15
A16
NC
V
CC
WE (W)
NC*
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
5
6
7
8
9
10
11
12
13
4
3
2
1
32
31
30
29
28
27
26
25
24
23
22
21
Low V
CC
Detector
A
0
~A
16
Address Latch
Program/Erase
Pulse Timer
Y-Decoder
Y-Gating
X-Decoder
1,048,576 bit
Cell Matrix
AS29F010
A14
A13
A8
A9
A11
OE (G)
A10
CE (E)
I/O7
AS29F010
AS29F010-01
*RP pin for
AS29F011
SELECTION GUIDE
29F010-70
Maximum access time
Chip enable access time
Output enable access time
t
AA
t
CE
t
OE
70
70
30
29F010-90
90
90
35
29F010-120
120
120
50
29F010-150
150
150
50
Unit
ns
ns
ns
ALLIANCE SEMICONDUCTOR
I/O1
I/O2
GND
I/O3
I/O4
I/O5
I/O6
14
15
16
17
18
19
20
AS29F010-02
AS29F010
AS29F011
FUNCTIONAL DESCRIPTION
The AS29F010 and AS29F011 are high performance 1 megabit
byte wide Flash EEPROM memories. They are organized as
131,072 words × 8 bits, and divided into four sectors of 32K bytes
each. Each sector is separately erased and programmed without
affecting data in the other sectors. All program, erase, and verify
operations are 5-volt only, and require no external 12V supply pin.
All required features for in-system programmability are provided.
The AS29F010 and AS29F011 provide high performance with a
maximum access time of 70, 90, 120, or 150 ns. Chip Enable (CE),
Output Enable (OE), and Write Enable (WE) pins allow easy
interface with the system bus. The AS29F011 is functionally
identical to the AS29F010 except for an additional input RP,
which controls a deep power-down function. When the RP pin is
pulled low (less than V
IL)
the AS29F011 is disabled, reducing
power consumption to virtually zero. The AS29F011 recovers in
<2 µs when RP is pulled high.
Program, erase, and verify operations are controlled with an on-
chip command register using a JEDEC standard Write State
Machine approach to enter commands. Each command requires
four write cycles to be executed. Address and data are latched
internally during all write, erase, and verify operations, and an
internal timer terminates each command. The chip has a typical
timer period of 200 µs for all commands but Erase, which has a
typical period of 800 ms. Under nominal conditions, a sector can
be completely programmed and verified in less than 12 seconds.
To program, erase, and verify a sector typically takes less than 18
seconds.
Data protection is provided by a low-V
CC
lockout and by error
checking in the Write State Machine. Data-bar polling and Toggle
Bit modes are used to show that the chip is executing a command
when the AS29F010 or AS29F011 is read during a write or erase
operation. After Erase or Program commands, Verify-1 and
Verify-0 command modes ensure sufficient margin for reliable
operation. (See command summary on page 5.)
The AS29F010 and AS29F011 are packaged in 32-pin DIP, PLCC
and TSOP packages with JEDEC standard pinouts for one megabit
Flash memories.
ARRAY ARCHITECTURE AND DATA POLARITY
The array consists of 128K (131,072) bytes divided into four
sectors of 32K bytes each. Addresses A15 and A16 select the four
sectors:
Sector
0
1
2
3
Address Range
00000h–07FFFh
08000h–0FFFFh
10000h–17FFFh
18000h–1FFFFh
all bytes in a 32K sector to the erased state FFh, or all bits set to 1.
Each sector is erased individually with no effect on the other
sectors.
Address Pins
A0–A5
A6–A14
A15–A16
Function
CA: Column addresses 00–3Fh
RA: Row addresses 000–1FFh
SA: Sector addresses 0–3h
The AS29F010 and AS29F011 are shipped in the erased state with
all bits set to 1. Programmed bits are set to 0. Data is programmed
into the array one byte at a time. Within a programmed byte, any
bit that remains set to 1 can be programmed to 0 later, but all
programmed bits remain set to 0 until the sector is erased and
verified using the Sector Erase and Verify algorithm. Erase returns
OPERATING MODES
The AS29F010 and AS29F011 are controlled by a Write State
Machine (WSM) that interprets and executes commands. At
power-up the WSM is reset to normal mode, which allows the chip
to operate as a ROM. Once a command is initiated by writing data
into the I/O pins with the WE pin, the WSM enters the command
mode and keeps the chip powered up until the command is
finished. After the command is terminated by the internal timer,
the WSM returns to the normal mode and the chip may be read as a
ROM.
The RP pin of the AS29F011 overrides all other inputs. Any
operation in progress is interrupted when the RP pin is pulled low.
2
AS29F010
AS29F011
MODE TABLE
Mode
Deep power down
Read
Output disable
Standby
Mfr. code
Part code
Write command
†
RP
†
L
H
H
H
H
H
H
CE
X
L
L
H
L
L
L
OE
X
L
H
H
L
L
H
WE
X
H
H
H
H
H
L
A0
X
A0
X
X
L
H
A0
A9
X
A9
X
X
Vh
Vh
A9
I/O
HI-Z
D
OUT
HI-Z
HI-Z
52h
03h
D
IN
RP is used only on the AS29F011.
Key:
L =Low (<V
IL
); H = High (>V
IH
); Vh = 11.5–12.5V; X =Don’t care
CE and OE are pulled low the outputs are enabled and a data byte
is read out. When A0 is pulled low the output data = 52h, a unique
Mfr. code for Alliance Semiconductor Flash products. When A0 is
high D
OUT
= 03h, the Alliance part code for the AS29F010.
Write command:
Selected by CE and WE pulled low, OE pulled
high. Initiates command mode in the WSM and latches addresses
and data into the chip. Once a write command starts, the WSM
stays in command mode until the command is completed or it
times out. Addresses are latched on the falling edge of WE and
CE; data is latched on the rising edge. The WE signal is filtered to
prevent spurious events from being detected as write commands.
Deep power down:
(AS29F011 only): RP low; all DC power
disabled. This interrupts any command in progress.
Read mode:
Selected with CE and OE low, WE high. Data is valid
T
aa
after addresses are stable, T
CE
after CE is low and T
OE
after
OE is low.
Output disable:
Part remains powered up; but outputs disabled
with OE pulled high.
Standby:
Part is powered down, and I
CC
reduced to 1.5 mA for
TTL input levels (<1.0 mA for CMOS input levels).
Mfr.
(manufacturer)
code, Part code:
Selected by A9 = 11.5–
12.5V per the JEDEC standard for non-volatile memories. When
COMMAND FORMAT
All commands require four bus write cycles to execute. After four
write cycles the command executes until terminated by the internal
timer. For verify commands a read operation after Write
[4]
in a
write command bus cycle reads out the data from the array. For
manufacturer and part code commands the ID code is read out. For
other operations a read operation reads out a status byte on the
outputs.
ADDRESS IN
Bus Write
[1]
Bus Write
[2]
Bus Write
[3]
Bus Write
[4]
Bus read
5555h
2AAAh
5555h
Address in
Address in
DATA IN
AAh
55h
Command code
Data in
D
OUT
command sequence to execute. The AS29F010 does not remain in
command mode after time-out. When a command times-out only
the error flag is not reset.
Errors and timeout:
Any of the following conditions sets the
error flag.
• Any write command which does not match the sequence
above for Write
{1]
. Write
{2]
, and Write
[3]
.
• Any write cycle that follows more than 150 µs after the
previous write cycle.
• The command Data
[3]
in Write
[3]
has more than one bit set
high. This indicates conflicting commands.
• V
CC
drops below V
LKO
during command execution.
Once the error flag is set, the AS29F010 times out and returns to
normal mode. The error flag remains until it is cleared by a reset
command. The error flag can be read by executing a status
command and reading the status byte.
Command timeout:
For each operation the address and data are
latched at bus Write
[4]
and held until the operation completes and
times-out. After time-out the WSM returns the AS29F010 to
normal mode. Each individual operation requires the 4-cycle write
3
AS29F010
AS29F011
COMMAND CODES AND TIME-OUT
The Command Code table displays the bus cycles required for
each command mode. Read delay is the minimum delay after
Write
[4]
during a write command bus cycle before a valid read may
be executed. Timeout indicates the maximum delay before the
WSM returns the AS29F010 to normal mode. Erase has a longer
timeout than the other modes. Status byte can be read almost
immediately after a Write
[4]
, but the verify commands require a 25
µs delay to read valid data.
COMMAND CODE TABLE
D
IN[3]
Write
[3]
Data
00h
01h
02h
04h
08h
10h
40h
80h
A
IN[4]
Write
[4]
Addr.
x
x
0000h
0001h
A
IN
A
IN
A
IN
A
IN
A
IN
Mode
Reset
Status
Mfr. Code
Verify-0
Verify-1
Converge
Program
Erase
D
IN[4]
Data
x
x
x
x
x
x
00h
D
IN
FFh
Read Addr.
0000h
0000h
0000h
0001h
A
IN
A
IN
A
IN
A
IN
A
IN
Read Data
Status
Status
MCODE
PCODE
D
OUT
D
OUT
Status
Status
Status
Read Delay
100 ns
100 ns
100 ns
100 ns
25 µs
25 µs
100 ns
100 ns
100 ns
Maximum
Time Out
250 µs
250 µs
250 µs
250 µs
250 µs
250 µs
250 µs
1000 µs
Note:
Code 02h is not used.
COMMAND ALGORITHMS
Individual write commands are used together in eight program and
erase algorithms to guarantee the 29F010 operating margins for the
life of the part. Refer to the AS29F010 Programming Specification
for details on the algorithms for program and erase operations.
4
AS29F010
AS29F011
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Symbol
V
CC
GND
Input Voltage
V
IH
V
IL
Min
4.5
0
2.0
–0.5
Typ
5.0
0
-
-
(T
a
= 0°C to +70°C)
Max
5.5
0
V
CC
+ 1.0
0.8
Unit
V
V
V
V
ABSOLUTE MAXIMUM RATINGS
Parameter
Input Voltage (Input or I/O pin)
Input Voltage (A9 pin)
Output Voltage
Power Supply Voltage
Operating Temperature
Storage Temperature (Plastic)
Short Circuit Output Current
Latch-up Current
Symbol
V
IN
V
IN
V
OUT
V
CC
T
OPR
T
STG
I
OUT
I
IN
Min
–1.0
–1.0
–1.0
+4.5
–55
–65
-
-
Max
V
CC
+ 1.0
+13.0
V
CC
+ 1.0
+5.5
+125
+125
100
±100
Unit
V
V
V
V
°C
°C
mA
mA
NOTE:
Stresses greater than those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions outside those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
MAXIMUM NEGATIVE OVERSHOOT WAVEFORM
20 ns
20 ns
-2.0V
20 ns
+0.8V
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
-0.5V
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AS29F010-03
MAXIMUM POSITIVE OVERSHOOT WAVEFORM
V
CC
+2.0V
V
CC
+0.5V
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
+2.0V
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
20 ns
20 ns
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
20 ns
AS29F010-04
5
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