ISO-9001 CERTIFIED BY DSCC
M.S.KENNEDY CORP.
FEATURES:
HIGH CURRENT,
SUPER LOW DROPOUT
FIXED VOLTAGE REGULATORS
5020
SERIES
(315) 701-6751
4707 Dey Road Liverpool, N.Y. 13088
Extremely Low Dropout Voltage: 0.50V @ 20 Amps
Available in 3.3V, 5.0V and 12.0V versions
Output Voltages Are Internally Set to ±1%
TTL Level Enable Pin
Externally Programmable Current Limit
Low Quiescent Current
Available Fully Qualified to Mil-PRF-38534
Output Current to 20 Amps
Regulation Dropout Fault Pin
MIL-PRF-38534 CERTIFIED
DESCRIPTION:
The MSK 5020 series voltage regulators are available in +3.3V, +5.0V or +12.0V fixed output configurations. All
three boast ultra low dropout specifications due to the utilization of a MOSFET output pass transistor with extremely
low Rds(on). Dropout voltages of 0.50V at 20 amps are typical in this configuration, which drives efficiency up and
power dissipation down. Accuracy is guaranteed with a 1% initial output voltage tolerance that varies only ±2%
with temperature. A TTL input level can be used to enable/disable the device and a regulation dropout Fault pin
provides a means of monitoring the output level. The MSK 5020 series is packaged in a thermally efficient 12 pin
power dip.
EQUIVALENT SCHEMATIC
TYPICAL APPLICATIONS
High Efficiency, High Current Linear Regulators
Constant Voltage/Current Regulators
System Power Supplies
Switching Power Supply Post Regulators
1
2
3
4
5
6
1
PIN-OUT INFORMATION
Enable
NC
Ground
Filter Capacitor
Input
Fault
12
11
10
9
8
7
Output
Output
Sense
VSC
VSC
Case Connection
Rev. F
1/05
APPLICATION NOTES
MINIMIZING OUTPUT RIPPLE:
The output voltage ripple of the MSK 5020 series voltage regu-
lators can be minimized by placing a filter capacitor from the
output to ground. The optimum value for this capacitor may
vary from one application to the next and is best determined by
experimentation. Transient load response can also be improved
by placing a 33uF or larger capacitor directly across the load.
FILTER CAPACITOR:
For all applications, the user must connect a 1.0uF capacitor
from pin 4 directly to ground. This capacitor is part of the
circuit which drives the gate of the internal MOSFETS. Ap-
proximately three times the voltage seen on the input will ap-
pear across this capacitor. Careful attention must be paid to
capacitor voltage rating since voltages larger than the power
supply are present.
HEAT SINK SELECTION:
CASE CONNECTIONS:
The case of the MSK 5020 is connected to pin seven of the
package but isolated from the internal circuitry allowing direct
attachment of the heat sink to the case. It may be necessary
in some applications to ground the case to limit noise or elimi-
nate oscillations on the output. Pin seven can be left as a no
connect if the designer chooses.
To select a heat sink for the MSK 5020, the following formula
for convective heat flow must be used.
Governing Equation:
Tj = Pd x (R
θ
jc + R
θ
cs + R
θ
sa) + Ta
WHERE:
Tj = Junction Temperature
Pd = Total Power Dissipation
R
θ
jc = Junction to Case Thermal Resistance
R
θ
cs = Case to Heat Sink Thermal Resistance
R
θ
sa = Heat Sink to Ambient Thermal Resistance
Ta = Ambient Temperature
First, the power dissipation must be calculated as follows:
Power Dissipation = (Vin - Vout) x Iout
Next, the user must select a maximum junction temperature.
The absolute maximum allowable junction temperature is 175°C.
The equation may now be rearranged to solve for the required
heat sink to ambient thermal resistance (R
θ
sa).
EXAMPLE;
An MSK 5020-3.3 is configured for Vin = +7V and Vout =
+3.3V. Iout is a continuous 10A DC level. The ambient tem-
perature is +25°C. The maximum desired junction tempera
ture is 150°C. R
θ
jc = 1.0°C/W and R
θ
cs = 0.15°C/W typi-
cally.
Power Dissipation = (7V - 3.3V) x (10A)
= 37 Watts
Solve for R
θ
sa:
R
θ
sa = 150°C - 25°C - 1.0°C/W - 0.15°C/W
37W
In this example, a heat sink with a thermal resistance of no
more than 2.23°C/W must be used to maintain a junction tem-
perature of no more than 150°C.
LOAD REGULATION:
For best results, the ground pin should be connected directly to
the load (see next note). This effectively reduces the ground
loop effect and eliminates excessive voltage drop in the sense
leg. It is also important to keep the output connection be-
tween the regulator and the load as short as possible since this
directly affects the load regulation. For example, if 20 gauge
wire were used which has a resistance of about .008 ohms per
foot, this would result in a drop of 80mV/ft at a load current of
10 amps.
LOAD CONNECTIONS:
In voltage regulator applications where very large load cur-
rents are present, the load connection is very important. The
path connecting the output of the regulator to the load must be
extremely low impedance to avoid affecting the load regulation
specifications. Any impedance in this path will form a voltage
divider with the load. The same holds true for the connection
from the low end of the load to ground. For best load regula-
tion, the low end of the load must be connected directly to pin
3 of the MSK 5020 and not to a ground plane inches away
from the hybrid.
ENABLE/DISABLE PIN:
The MSK 5020 series of voltage regulators are equipped with a
TTL compatible ENABLE pin. A TTL high level on this pin acti-
vates the internal bias circuit and powers up the device. A TTL
low level on this pin places the controller in shutdown mode
and the device draws only 10µA of quiescent current. This pin
can be connected to V
IN
if the enable function is not desired.
POWER DISSIPATION:
The output pass transistors in the MSK 5020 are rated to dissi-
pate nearly 200 watts. The limiting factor of this device is
effective dissipation of heat generated under such conditions.
For example, to dissipate 200 watts, calculations show that
the MSK 5020 would have to be bolted to the underbelly of a
submarine submerged in the Arctic Ocean! Careful consider-
ation must be paid to heat dissipation and junction temperature
when applying this device.
FAULT PIN CONNECTIONS
Pin 6 of the MSK 5020 series is the Fault pin. When the out-
put voltage drops 6% or more below its nominal value, the
voltage level on the Fault pin drops to a logic low (typically less
than 0.1 volts). This pin can be used to drive a light emitting
diode or other external circuitry as long as the current is limited
to less than 10.0mA (see typical connection diagram). The
Fault pin is an open collector output so the high state output
voltage will be equal to the pull up voltage since no current
flows under these conditions.
CURRENT LIMIT CONNECTIONS
To implement current limiting, a sense resistor (Rsc) must be
placed from pin 5 to pins 8,9 and 10 as shown in the typical
connection diagram. When the voltage drop across the sense
resistor reaches 35mV, the internal control loop limits the out-
put current only enough to maintain 35mV across the sense
resistor. The device is not disabled. The following formula
may be used to find the correct value of sense resistance:
R
SC
=35mV/I
LIM
If current limit is not required simply connect the Vsc pins di-
rectly to the input voltage along with the sense pin. Refer to
the typical connection diagram for an illustration.
3
Rev. F 1/05
FPGA/CPLD
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