The LSTTL / MSI SN54 / 74LS153 is a very high speed Dual 4-Input
Multiplexer with common select inputs and individual enable inputs for each
section. It can select two bits of data from four sources. The two buffered
outputs present data in the true (non-inverted) form. In addition to multiplexer
operation, the LS153 can generate any two functions of three variables. The
LS153 is fabricated with the Schottky barrier diode process for high speed and
is completely compatible with all Motorola TTL families.
SN54/74LS153
•
•
•
•
DUAL 4-INPUT MULTIPLEXER
LOW POWER SCHOTTKY
Multifunction Capability
Non-Inverting Outputs
Separate Enable for Each Multiplexer
Input Clamp Diodes Limit High Speed Termination Effects
CONNECTION DIAGRAM DIP
(TOP VIEW)
VCC
16
Eb
15
S0
14
I3b
13
I2b
12
I1b
11
I0b
10
Zb
9
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
16
J SUFFIX
CERAMIC
CASE 620-09
1
1
Ea
2
S1
3
I3a
4
I2a
5
I1a
6
I0a
7
Za
8
GND
16
1
N SUFFIX
PLASTIC
CASE 648-08
PIN NAMES
S0
E
I0, I1
Z
Common Select Input
Enable (Active LOW) Input
Multiplexer Inputs
Multiplexer Output (Note b)
LOADING
(Note a)
HIGH
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
LOW
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 (2.5) U.L.
16
1
D SUFFIX
SOIC
CASE 751B-03
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
µA
HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
LOGIC DIAGRAM
Ea I0a
1
6
5
I1a
4
I2a
3
I3a
2
S1
14
S0
10
I0b
11
I1b
12
I2b
13
I3b Eb
15
LOGIC SYMBOL
1
6
5
4
3
10 11 12 13
15
14
2
Ea I0a I1a I2a I3a
S0
Sa
Za
7
I0b I1b I2b I3b Eb
Zb
9
7
Za
VCC = PIN 16
GND = PIN 8
= PIN NUMBERS
VCC = PIN 16
GND = PIN 8
9
Zb
FAST AND LS TTL DATA
5-257
SN54/74LS153
FUNCTIONAL DESCRIPTION
The LS153 is a Dual 4-input Multiplexer fabricated with Low
Power, Schottky barrier diode process for high speed. It can
select two bits of data from up to four sources under the control
of the common Select Inputs (S0, S1). The two 4-input multi-
plexer circuits have individual active LOW Enables (Ea, E b)
which can be used to strobe the outputs independently. When
the Enables (Ea, Eb) are HIGH, the corresponding outputs (Za,
Zb) are forced LOW.
The LS153 is the logic implementation of a 2-pole, 4-posi-
tion switch, where the position of the switch is determined by
the logic levels supplied to the two Select Inputs. The logic
equations for the outputs are shown below.
Za = Ea
⋅
(I0a
⋅
S1
⋅
S0 + I1a
⋅
S1
⋅
S0 + I2a
⋅
S1
⋅
S0 +
I3a
⋅
S1
⋅
S0)
Zb = Eb
⋅
(I0b
⋅
S1
⋅
S0 + I1b
⋅
S1
⋅
S0 + I2b
⋅
S1
⋅
S0 +
I3b
⋅
S1
⋅
S0)
The LS153 can be used to move data from a group of regis-
ters to a common output bus. The particular register from
which the data came would be determined by the state of the
Select Inputs. A less obvious application is a function genera-
tor. The LS153 can generate two functions of three variables.
This is useful for implementing highly irregular random logic.
TRUTH TABLE
SELECT INPUTS
S0
X
L
L
H
H
L
L
H
H
S1
X
L
L
L
L
H
H
H
H
E
H
L
L
L
L
L
L
L
L
INPUTS (a or b)
I0
X
L
H
X
X
X
X
X
X
I1
X
X
X
L
H
X
X
X
X
I2
X
X
X
X
X
L
H
X
X
I3
X
X
X
X
X
X
X
L
H
OUTPUT
Z
L
L
H
L
H
L
H
L
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
GUARANTEED OPERATING RANGES
Symbol
VCC
TA
IOH
IOL
Supply Voltage
Operating Ambient Temperature Range
Output Current — High
Output Current — Low
Parameter
54
74
54
74
54, 74
54
74
Min
4.5
4.75
– 55
0
Typ
5.0
5.0
25
25
Max
5.5
5.25
125
70
– 0.4
4.0
8.0
Unit
V
°C
mA
mA
FAST AND LS TTL DATA
5-258
SN54/74LS153
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
VIH
VIL
VIK
VOH
Parameter
Input HIGH Voltage
54
Input LOW Voltage
74
Input Clamp Diode Voltage
54
Output HIGH Voltage
74
54, 74
VOL
Output LOW Voltage
74
Input HIGH Current
0.1
Input LOW Current
Short Circuit Current (Note 1)
Power Supply Current
– 20
– 0.4
– 100
10
0.35
0.5
20
IIH
IIL
IOS
ICC
V
µA
mA
mA
mA
mA
2.7
3.5
0.25
0.4
V
V
2.5
– 0.65
3.5
0.8
– 1.5
V
V
Min
2.0
0.7
V
Typ
Max
Unit
V
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
VCC = MIN, IIN = – 18 mA
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
IOL = 4.0 mA
IOL = 8.0 mA
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
VCC = MAX, VIN = 2.7 V
VCC = MAX, VIN = 7.0 V
VCC = MAX, VIN = 0.4 V
VCC = MAX
VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
(TA = 25°C)
Limits
Symbol
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
Parameter
Propagation Delay
Data to Output
Propagation Delay
Select to Output
Propagation Delay
Enable to Output
Min
Typ
10
17
19
25
16
21
Max
15
26
29
38
24
32
Unit
ns
ns
ns
Figure 2
Figure 1
Figure 2
VCC = 5.0 V
CL = 15 pF
Test Conditions
AC WAVEFORMS
V
IN
1.3 V
1.3 V
V
IN
1.3 V
1.3 V
t
PHL
t
PLH
t
PHL
t
PLH
V
OUT
1.3 V
1.3 V
V
OUT
1.3 V
1.3 V
Figure 1
Figure 2
FAST AND LS TTL DATA
5-259
-A-
Case 751B-03 D Suffix
16-Pin Plastic
SO-16
NOTES:
1.
DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2.
3.
CONTROLLING DIMENSION: MILLIMETER.
DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4.
MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5.
751B 01 IS OBSOLETE, NEW STANDARD
751B 03.
16
9
-B-
1
8
P
8 PL
0.25 (0.010)
M
B
M
R X 45°
G
-T-
D
16 PL
0.25 (0.010)
M
C
SEATING
PLANE
K
T
B
S
M
F
J
A
S
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
3.80
1.35
0.35
0.40
10.00
4.00
1.75
0.49
1.25
INCHES
MIN
MAX
0.386
0.150
0.054
0.014
0.016
0.393
0.157
0.068
0.019
0.049
1.27 BSC
0.19
0.10
0
0.25
0.25
7
0.050 BSC
0.008
0.004
0
0.009
0.009
7
°
°
°
°
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
Case 648-08 N Suffix
16-Pin Plastic
-A-
16
9
NOTES:
1.
DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2.
3.
CONTROLLING DIMENSION: INCH.
DIMENSION L" TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4.
DIMENSION B" DOES NOT INCLUDE MOLD
FLASH.
5.
6.
ROUNDED CORNERS OPTIONAL.
648 01 THRU 07 OBSOLETE, NEW STANDARD
648 08.
B
1
8
F
S
C
-T-
K
SEATING
PLANE
L
H
G
D
16 PL
0.25 (0.010)
M
J
M
T
A
M
DIM
A
B
C
D
F
G
H
J
K
L
M
S
MILLIMETERS
MIN
MAX
18.80
6.35
3.69
0.39
1.02
19.55
6.85
4.44
0.53
1.77
INCHES
MIN
MAX
0.740
0.250
0.145
0.015
0.040
0.770
0.270
0.175
0.021
0.070
2.54 BSC
1.27 BSC
0.21
2.80
7.50
0
0.38
3.30
7.74
10
0.100 BSC
0.050 BSC
0.008
0.110
0.295
0
0.015
0.130
0.305
10
°
°
°
°
0.51
1.01
0.020
0.040
-A-
16
9
Case 620-09 J Suffix
16-Pin Ceramic Dual In-Line
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
-B-
1
8
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIM F MAY NARROW TO 0.76 (0.030) WHERE
THE LEAD ENTERS THE CERAMIC BODY.
C
L
5. 620 01 THRU 08 OBSOLETE, NEW STANDARD
620 09.
-T-
SEATING
PLANE
K
E
F
D
16 PL
0.25 (0.010)
M
N
G
T
A
S
M
J
16 PL
0.25 (0.010)
M
T
B
S
DIM
A
B
C
D
E
F
G
J
K
L
M
N
MILLIMETERS
MIN
MAX
19.05
6.10
19.55
7.36
4.19
0.39
0.53
INCHES
MIN
MAX
0.750
0.240
0.770
0.290
0.165
0.015
0.021
1.27 BSC
1.40
1.77
0.050 BSC
0.055
0.070
2.54 BSC
0.23
0.27
5.08
7.62 BSC
0
0.100 BSC
0.009
0.011
0.200
0.300 BSC
0
°
15
°
°
15
°
0.39
0.88
0.015
0.035
FAST AND LS TTL DATA
5-260
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
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associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
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are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
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