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A3985SLD-T

产品描述Full Bridge Based MOSFET Driver, 0.2A, PDSO38, LEAD FREE, MO-153BD-1, TSSOP-38
产品类别模拟混合信号IC    驱动程序和接口   
文件大小443KB,共15页
制造商Allegro
官网地址http://www.allegromicro.com/
标准
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A3985SLD-T概述

Full Bridge Based MOSFET Driver, 0.2A, PDSO38, LEAD FREE, MO-153BD-1, TSSOP-38

A3985SLD-T规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Allegro
零件包装代码TSSOP
包装说明TSSOP,
针数38
Reach Compliance Codecompliant
ECCN代码EAR99
高边驱动器YES
接口集成电路类型FULL BRIDGE BASED MOSFET DRIVER
JESD-30 代码R-PDSO-G38
JESD-609代码e3
长度9.7 mm
湿度敏感等级2
功能数量1
端子数量38
最高工作温度85 °C
最低工作温度-20 °C
标称输出峰值电流0.2 A
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度)260
认证状态Not Qualified
座面最大高度1.2 mm
最大供电电压5.5 V
最小供电电压3 V
标称供电电压5 V
电源电压1-最大50 V
电源电压1-分钟12 V
表面贴装YES
温度等级OTHER
端子面层Matte Tin (Sn)
端子形式GULL WING
端子节距0.5 mm
端子位置DUAL
处于峰值回流温度下的最长时间40
断开时间0.12 µs
接通时间0.12 µs
宽度4.4 mm
Base Number Matches1

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A3985
Digitally Programmable
Dual Full-Bridge MOSFET Driver
Features and Benefits
Serial interface for full digital control
Dual full-bridge gate drive for N-channel MOSFETs
Dual 6-bit DAC current reference
Operation over 12 to 50 V supply voltage range
Synchronous rectification
Cross-conduction protection
Adjustable mixed decay
Fixed off-time PWM current control
Low-current idle mode
Description
The A3985 is a flexible dual full-bridge gate driver suitable
for driving a wide range of higher power industrial bipolar 2-
phase stepper motors or 2-phase brushless dc motors. It can
also be used to drive two individual torque motors or solenoid
actuators. Motor power is provided by external N-channel power
MOSFETs at supply voltages from 12 to 50 V.
Full digital control is provided by two serially-accessible
registers that allow programming of off-time, blank-time,
dead-time, mixed decay ratios, synchronous rectification,
master clock source selection, and division ratio and idle
mode. All internal timings are derived from a master clock
that can be generated on-chip or provided by an external
clock such as the system clock of the master controller. A
programmable divider allows for a wide range of external
system clock frequencies.
The internal fixed off-time PWM current-control timing is
programmed via the serial interface to operate in slow, fast,
and mixed current-decay modes. The desired load-current level
and direction is set via the serial port with a direction bit and
two 6-bit linear DACs in conjunction with a reference voltage.
The seven bits of control allow maximum flexibility in torque
Continued on the next page…
Package: 38 pin TSSOP (suffix LD)
Approximate size
Typical Application
3985-DS

 
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