BUK71/7907-55AIE
TrenchPLUS standard level FET
Rev. 01 — 12 August 2002
Product data
1. Product profile
1.1 Description
N-channel enhancement mode field-effect power transistor in a plastic package using
TrenchMOS™ technology, featuring very low on-state resistance, TrenchPLUS
current sensing and diodes for ESD protection.
Product availability:
BUK7107-55AIE in SOT426 (D
2
-PAK)
BUK7907-55AIE in SOT263B (TO-220AB).
1.2 Features
s
Integrated current sensor
s
ESD protection
s
Q101 compliant
s
Standard level compatible.
1.3 Applications
s
Variable Valve Timing for engines
s
Electrical Power Assisted Steering.
1.4 Quick reference data
s
V
DS
≤
55 V
s
I
D
≤
140 A
s
R
DSon
= 5.8 mΩ (typ)
s
I
D
/I
sense
= 500 (typ).
2. Pinning information
Table 1:
Pin
1
2
3
4
5
mb
Pinning - SOT426 and SOT263B, simplified outline and symbol
Simplified outline
mb
mb
Description
gate (g)
I
sense
drain (d)
Kelvin source
source (s)
mounting base;
connected to drain (d)
Symbol
d
1 2 3 4 5
g
Front view
MBK127
MBL368
Isense
s
Kelvin source
1
5
MBL263
SOT426 (D
2
-PAK)
SOT263B (TO-220AB)
Philips Semiconductors
BUK71/7907-55AIE
TrenchPLUS standard level FET
3. Limiting values
Table 2: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
DGS
V
GS
I
D
Parameter
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage (DC)
drain current (DC)
T
mb
= 25
°C;
V
GS
= 10 V;
Figure 2
and
3
T
mb
= 100
°C;
V
GS
= 10 V;
Figure 2
I
DM
P
tot
I
GS(CL)
T
stg
T
j
I
DR
I
DRM
E
DS(AL)S
peak drain current
total power dissipation
gate-source clamping current
storage temperature
junction temperature
reverse drain current
peak reverse drain current
non-repetitive drain-source avalanche
energy
T
mb
= 25
°C
T
mb
= 25
°C;
pulsed; t
p
≤
10
µs
unclamped inductive load; I
D
= 68 A;
V
DS
≤
55 V; V
GS
= 10 V; R
GS
= 50
Ω;
starting T
j
= 25
°C
[1]
[2]
[1]
[2]
[2]
Conditions
I
DG
= 250
µA
Min
-
-
-
-
-
-
-
-
-
-
−55
−55
-
-
-
-
Max
55
55
±20
140
75
75
560
272
10
50
+175
+175
140
75
560
460
Unit
V
V
V
A
A
A
A
W
mA
mA
°C
°C
A
A
A
mJ
T
mb
= 25
°C;
pulsed; t
p
≤
10
µs;
Figure 3
T
mb
= 25
°C;
Figure 1
continuous
t
p
= 5 ms;
δ
= 0.01
Source-drain diode
Avalanche ruggedness
Electrostatic Discharge
V
esd
electrostatic discharge voltage; all pins Human Body Model; C = 100 pF;
R = 1.5 kΩ
6
kV
[1]
[2]
Current is limited by power dissipation chip rating
Continuous current is limited by package.
9397 750 09877
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 — 12 August 2002
2 of 15
Philips Semiconductors
BUK71/7907-55AIE
TrenchPLUS standard level FET
120
Pder
(%)
80
03na19
160
ID
(A)
120
03ni63
80
40
40
Capped at 75A due to package
0
0
50
100
150
200
Tmb
(°C)
0
0
50
100
150
200
Tmb (°C)
P
tot
P
der
=
----------------------
×
100%
-
P
°
tot
(
25 C
)
V
GS
≥
10 V
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Continuous drain current as a function of
mounting base temperature.
103
ID
(A)
03nf55
Limit RDSon = VDS/ID
tp = 10
µs
102
100
µs
Capped at 75 A due to package
1 ms
DC
10
10 ms
100 ms
1
1
10
VDS (V)
102
T
mb
= 25
°C;
I
DM
single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 09877
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 — 12 August 2002
3 of 15
Philips Semiconductors
BUK71/7907-55AIE
TrenchPLUS standard level FET
4. Thermal characteristics
Table 3:
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to ambient
SOT263B
SOT426
R
th(j-mb)
thermal resistance from junction to
mounting base
vertical in still air
minimum footprint; mounted on a PCB
Figure 4
-
-
-
60
50
-
-
-
K/W
K/W
Conditions
Min
Typ
Max Unit
0.55 K/W
4.1 Transient thermal impedance
1
Z
th(j-mb)
(K/W)
03ni29
δ
= 0.5
10-1
0.2
0.1
0.05
10-2
0.02
P
single shot
δ
=
tp
T
tp
T
t
10-3
10-6
10-5
10-4
10-3
10-2
10-1
1
tp (s)
10
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 09877
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 — 12 August 2002
4 of 15
Philips Semiconductors
BUK71/7907-55AIE
TrenchPLUS standard level FET
5. Characteristics
Table 4: Characteristics
T
j
= 25
°
C unless otherwise specified.
Symbol
V
(BR)DSS
Parameter
drain-source breakdown
voltage
Conditions
I
D
= 0.25 mA; V
GS
= 0 V
T
j
= 25°C
T
j
=
−55 °C
V
GS(th)
gate-source threshold voltage I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
T
j
= 25°C
T
j
= 175
°C
T
j
=
−55 °C
I
DSS
drain-source leakage current
V
DS
= 55 V; V
GS
= 0 V
T
j
= 25°C
T
j
= 175
°C
V
(BR)GSS
I
GSS
gate-source breakdown
voltage
gate-source leakage current
I
G
=
±1
mA;
−55°C
< T
j
<175
°C
V
GS
=
±10
V; V
DS
= 0 V
T
j
= 25
°C
T
j
= 175
°C
R
DSon
drain-source on-state
resistance
V
GS
= 10 V; I
D
= 50 A;
Figure 7
and
8
T
j
= 25°C
T
j
= 175
°C
I
D
/I
sense
ratio of drain current to sense V
GS
> 10 V;
current
−55°C
< T
j
<175
°C
total gate charge
gate-source charge
gate-to-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
turn-off delay time
fall time
internal drain inductance
from upper edge of drain
mounting base to center of
die
from source lead to source
bond pad
V
DS
= 30 V; R
L
= 1.2
Ω;
V
GS
= 10 V; R
G
= 10
Ω
V
GS
= 0 V; V
DS
= 25 V;
f = 1 MHz;
Figure 12
V
GS
= 10 V; V
DS
= 44 V;
I
D
= 25 A;
Figure 14
-
-
450
5.8
-
500
7
14
550
mΩ
mΩ
-
-
22
-
1000
10
nA
µA
-
-
20
0.1
-
22
10
250
-
µA
µA
V
2
1
-
3
-
-
4
-
4.4
V
V
V
55
50
-
-
-
-
V
V
Min
Typ
Max
Unit
Static characteristics
Dynamic characteristics
Q
g(tot)
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
L
d
-
-
-
-
-
-
-
-
-
-
-
116
19
50
4500
960
510
36
115
159
111
2.5
-
-
-
-
-
-
-
-
-
-
-
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
nH
L
s
internal source inductance
-
7.5
-
nH
9397 750 09877
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 — 12 August 2002
5 of 15
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