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5962H9658501VEC

产品描述Adder/Subtractor, ACT Series, 4-Bit, CMOS, CDIP16, SIDE BRAZED, CERAMIC, DIP-16
产品类别逻辑    逻辑   
文件大小249KB,共17页
制造商Cobham PLC
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5962H9658501VEC概述

Adder/Subtractor, ACT Series, 4-Bit, CMOS, CDIP16, SIDE BRAZED, CERAMIC, DIP-16

5962H9658501VEC规格参数

参数名称属性值
包装说明DIP, DIP16,.3
Reach Compliance Codeunknown
ECCN代码3A001.A.1.A
其他特性FULL ADDER; WITH INTERNAL CARRY LOOKAHEAD; PERMITS RIPPLE CARRY CASCADING
系列ACT
JESD-30 代码R-XDIP-T16
JESD-609代码e4
长度19.05 mm
逻辑集成电路类型ADDER/SUBTRACTOR
位数4
功能数量1
端子数量16
最高工作温度125 °C
最低工作温度-55 °C
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码DIP
封装等效代码DIP16,.3
封装形状RECTANGULAR
封装形式IN-LINE
电源5 V
传播延迟(tpd)16 ns
认证状态Qualified
筛选级别38535V;38534K;883S
座面最大高度5.08 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术CMOS
温度等级MILITARY
端子面层GOLD
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
总剂量1M Rad(Si) V
宽度7.62 mm
Base Number Matches1

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REVISIONS
LTR
A
DESCRIPTION
Add limit for linear energy threshold (LET) with no latch-up in section 1.5.
Update the boilerplate to the requirements of MIL-PRF-38535. Editorial
changes throughout. – TVN
Update boilerplate paragraphs and radiation paragraphs 4.4.4.1 – 4.4.4.4 to
the current MIL-PRF-38535 requirements. - LTG
To correct switching waveforms input/output test limits to figure 4. Add test
equivalent circuits and footnote 5 to figure 4. Add paragraph 2.2 for ASTM
F1192 document. Delete class M requirements throughout. - MAA
DATE (YR-MO-DA)
06-04-25
APPROVED
Thomas M. Hess
B
12-04-19
Thomas M. Hess
C
13-02-05
Thomas M. Hess
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
C
15
C
16
REV
SHEET
PREPARED BY
Joseph A. Kerby
CHECKED BY
Charles F. Saffle Jr.
APPROVED BY
Monica L. Poelking
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DSCC FORM 2233
APR 97
DRAWING APPROVAL DATE
96-12-20
REVISION LEVEL
C
1
C
2
C
3
C
4
C
5
C
6
C
7
C
8
C
9
C
10
C
11
C
12
C
13
C
14
STANDARD
MICROCIRCUIT
DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
MICROCIRCUIT, DIGITAL, RADIATION
HARDENED, ADVANCED CMOS, 4-BIT BINARY
FULL ADDER WITH FAST CARRY, TTL
COMPATIBLE INPUTS, MONOLITHIC SILICON
SIZE
CAGE CODE
C
A
67268
SHEET
1 OF 16
5962-96585
5962-E191-13

 
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