REVISIONS
LTR
A
B
C
DESCRIPTION
Changes in accordance with NOR 5962-R114-92. glg
Changes in accordance with NOR 5962-R160-98. glg
Boilerplate update and part of five year review. tcr
DATE (YR-MO-DA)
92-01-22
98-08-06
07-04-13
APPROVED
Michael A. Frye
Raymond Monnin
Robert M. Heber
THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.
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OF SHEETS
PMIC N/A
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PREPARED BY
Kenneth Rice
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DEFENSE SUPPLY CENTER COLUMBUS
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
CHECKED BY
Charles Reusing
APPROVED BY
Michael A. Frye
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
MICROCIRCUIT, MEMORY, DIGITAL, CMOS
64K x 8 ELECTRICALLY ERASABLE PROGRAMMABLE
READ ONLY MEMORY (EEPROM), MONOLITHIC
SILICON
DRAWING APPROVAL DATE
91-10-18
REVISION LEVEL
C
SIZE
A
SHEET
CAGE CODE
67268
1 OF
34
5962-E079-07
5962-90869
DSCC FORM 2233
APR 97
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)
and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
-
90869
01
M
X
A
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
/
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
Generic number
28C512
"
"
"
"
"
"
"
28C513
"
"
"
"
"
"
"
Circuit function
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
64K x 8 EEPROM
Access time
250 ns
250 ns
200 ns
200 ns
150 ns
150 ns
120 ns
120 ns
250 ns
250 ns
200 ns
200 ns
150 ns
150 ns
120 ns
120 ns
Write speed
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
10 ms
5 ms
Write mode
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Byte/Page
Endurance
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
10,000 cycle
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
M
Q or V
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant, non-
JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Certification and qualification to MIL-PRF-38535
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-90869
SHEET
C
2
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
Z
U
Descriptive designator
Terminals
See figure 1 (1.685" x .600" x .225")
32
C-12 (.560" x .458" x .120")
32
See figure 1 (.830" x .416" x .120")
32
See figure 1 (.760" x .760" x .120"
36
Package style
dual in-line package
rectangular chip carrier package
flat package
pin grid array
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
1.3 Absolute maximum ratings. 1/ 2/
Supply voltage range (VCC) ............................................................................... -0.5 V dc to +6.0 V dc 3/
Operating case temperature range .................................................................... -55°C to +125°C
Storage temperature range ................................................................................. -65°C to +150°C
Lead temperature (soldering, 10 seconds) ......................................................... +300°C
Thermal resistance, junction-to-case (θJC):
Case X .............................................................................................................. 28°C/W 4/
Case Y ........................................................................................................... See MIL-STD-1835
Case Z ........................................................................................................... 22°C/W 4/
Case U ........................................................................................................... 20°C/W 4/
Maximum power dissipation (PD) ...................................................................... 1.0 watts
Junction temperature (TJ) ................................................................................ +175°C 5/
Endurance........................................................................................................... 10,000 cycles/byte (minimum)
Data retention ..................................................................................................... 10 years minimum
1.4 Recommended operating conditions.
Supply voltage range (VCC) ............................................................................. 4.5 V dc minimum to 5.5 V dc maximum
Supply voltage (VSS) ........................................................................................ 0.0 V dc
High level input voltage range (VIH) .................................................................. 2.0 V dc to VCC + 1.0 V dc
Low level input voltage range (VIL) ..................................................................... -0.1 V dc to 0.8 V dc
Case operating temperature range (TC) ............................................................. -55°C to +125°C
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in
the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
_______
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/ All voltages referenced to VSS (VSS = ground), unless otherwise specified.
3/ Negative undershoots to a minimum of -1.0 V are allowed with a maximum of 20 ns pulse width.
4/ When the thermal resistance for this case is specified in MIL-STD-1835, that value shall supersede
the value indicated herein.
5/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening
conditions in accordance with method 5004 of MIL-STD-883.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-90869
SHEET
C
3
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 -
MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at
http://assist.daps.dla.mil/quicksearch/
or
http://assist.daps.dla.mil
or from the
Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM Standard F1192 -
Standard Guide for the Measurement of Single Event Phenomena (SEP) induced by
Heavy Ion Irradiation of Semiconductor Devices.
(Applications for copies of ASTM publications should be addressed to:
ASTM International, PO Box C700, 100 Barr
Harbor Drive, West Conshohocken, PA 19428-2959;
http://www.astm.org.)
ELECTRONICS INDUSTRIES ALLIANCE (EIA)
JEDEC Standard EIA/JESD 78 - IC Latch-Up Test.
(Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Boulevard, Arlington, VA
22201;
http://www.jedec.org.)
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute
the documents. These documents also may be available in or through libraries or other informational services.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in
MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outlines. The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Truth table. The truth table shall be as specified on figure 3.
3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be as specified in 4.4.5e.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full
case operating temperature range.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-90869
SHEET
C
4
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table IA.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be
in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and
herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 42 (see MIL-PRF-38535, appendix A).
3.11 Processing of EEPROMs: All testing requirements and quality assurance provisions herein shall be satisfied by the
manufacturer prior to delivery.
3.11.1 Conditions of the supplied devices: Devices will be supplied in cleared state (logic "1's"). No provision will be made for
supplying written devices.
3.11.2 Clearing of EEPROMs:
characteristics specified in 4.6.4.
When specified, devices shall be cleared in accordance with the procedures and
3.11.3 Writing of EEPROMs: When specified, devices shall be written in accordance with the procedures and characteristics
specified in 4.6.3.
3.11.4 Verification of state of EEPROMs: When specified, devices shall be verified as either written to the specified pattern or
cleared. As a minimum, verification shall consist of performing a read of the entire array to verify that all bits are in the proper
state. Any bit that does not verify to be in the proper state shall constitute a device failure and the device shall be removed from
the lot or sample.
3.11.5 Power supply sequence of EEPROMs: In order to reduce the probability of inadvertent writes, the following power
supply sequences shall be observed:
a.
b.
A logic high state shall be applied to
WE
and/or CE at the same time or before the application of VCC.
A logic high state shall be applied to
WE
and/or CE at the same time or before the removal of VCC.
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-90869
SHEET
C
5
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