REJ09B0327-0400
16
H8S/2148
Group
, H8S/2144
Group
,
H8S/2148F-ZTAT™, H8S/2147N F-ZTAT™,
H8S/2144F-ZTAT™, H8S/2142F-ZTAT™
Hardware Manual
Renesas 16-Bit Single-Chip Microcomputer
H8S Family/H8S/2100 Series
H8S/2148
HD6432148S
HD6432148SW
HD64F2148
HD64F2148V
HD64F2148A
HD64F2148AV
HD6432147S
HD6432147SW
HD64F2147A
HD64F2147AV
H8S/2147N HD64F2147N
HD64F2147NV
H8S/2144
HD6432144S
HD64F2144
HD64F2144V
HD64F2144A
HD64F2144AV
H8S/2143
HD6432143S
H8S/2142
HD6432142
HD64F2142R
HD64F2142RV
H8S/2147
Rev. 4.00
Revision Date: Sep 27, 2006
Keep safety first in your circuit designs!
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and
more reliable, but there is always the possibility that trouble may occur with them. Trouble with
semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate
measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or
(iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas
Technology Corp. product best suited to the customer's application; they do not convey any license
under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or
a third party.
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-
party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or
circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and
algorithms represents information on products at the time of publication of these materials, and are
subject to change by Renesas Technology Corp. without notice due to product improvements or
other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or
an authorized Renesas Technology Corp. product distributor for the latest product information
before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising
from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corp. by various means,
including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data,
diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total
system before making a final decision on the applicability of the information and products. Renesas
Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the
information contained herein.
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or
system that is used under circumstances in which human life is potentially at stake. Please contact
Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when
considering the use of a product contained herein for any specific purposes, such as apparatus or
systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in
whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must
be exported under a license from the Japanese government and cannot be imported into a country
other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the
country of destination is prohibited.
8. Please contact Renesas Technology Corp. for further details on these materials or the products
contained therein.
Rev. 4.00 Sep 27, 2006 page ii of xliv
General Precautions on Handling of Product
1. Treatment of NC Pins
Note: Do not connect anything to the NC pins.
The NC (not connected) pins are either not connected to any of the internal circuitry or are
used as test pins or to reduce noise. If something is connected to the NC pins, the
operation of the LSI is not guaranteed.
2. Treatment of Unused Input Pins
Note: Fix all unused input pins to high or low level.
Generally, the input pins of CMOS products are high-impedance input pins. If unused pins
are in their open states, intermediate levels are induced by noise in the vicinity, a pass-
through current flows internally, and a malfunction may occur.
3. Processing before Initialization
Note: When power is first supplied, the product’s state is undefined.
The states of internal circuits are undefined until full power is supplied throughout the
chip and a low level is input on the reset pin. During the period where the states are
undefined, the register settings and the output state of each pin are also undefined. Design
your system so that it does not malfunction because of processing while it is in this
undefined state. For those products which have a reset function, reset the LSI immediately
after the power supply has been turned on.
4. Prohibition of Access to Undefined or Reserved Addresses
Note: Access to undefined or reserved addresses is prohibited.
The undefined or reserved addresses may be used to expand functions, or test registers
may have been be allocated to these addresses. Do not access these registers; the system’s
operation is not guaranteed if they are accessed.
Rev. 4.00 Sep 27, 2006 page iii of xliv
Rev. 4.00 Sep 27, 2006 page iv of xliv
Preface
The H8S/2148 Group, H8S/2144 Group, and H8S/2147N comprise high-performance
microcomputers with a 32-bit H8S/2000 CPU core, and a set of on-chip supporting functions
required for system configuration.
The H8S/2000 CPU can execute basic instructions in one state, and is provided with sixteen
internal 16-bit general registers with a 32-bit configuration, and a concise and optimized
instruction set. The CPU can handle a 16-Mbyte linear address space (architecturally 4 Gbytes).
Programs based on the high-level language C can also be run efficiently.
Single-power-supply flash memory (F-ZTAT™*) and mask ROM versions are available,
providing a quick and flexible response to conditions from ramp-up through full-scale volume
production, even for applications with frequently changing specifications.
On-chip peripheral functions include a 16-bit free-running timer (FRT), 8-bit timer (TMR),
watchdog timer (WDT), two PWM timers (PWM and PWMX), a serial communication interface
(SCI, IrDA), PS/2-compatible keyboard buffer controller, host interface (HIF), D/A converter
2
(DAC), A/D converter (ADC), and I/O ports. An I C bus interface (IIC) can also be incorporated
as an option.
An on-chip data transfer controller (DTC) is also provided, enabling high-speed data transfer
without CPU intervention.
The H8S/2148 Group has all the above on-chip supporting functions, and can also be provided
with an IIC module as an option. The H8S/2144 Group comprises reduced-function versions, with
fewer TMR channels, and no PWM, keyboard buffer controller, HIF, IIC, or DTC modules, and
the H8S/2147N with fewer TMR channels, no DTC and some other functions.
Use of the H8S/2148 Group, H8S/2144 Group, H8S/2147N enables compact, high-performance
systems to be implemented easily. The comprehensive PC-related interface functions and 16
×
8
matrix key-scan functions are ideal for applications such as notebook PC keyboard control and
intelligent battery and power supply control, while the various timer functions and their
2
interconnectability (timer connection), plus the interlinked operation of the I C bus interface and
data transfer controller (DTC), in particular, make these devices ideal for use in PC monitors. In
addition, the combination of F-ZTAT™* and reduced-function versions is ideal for applications
such as CD-ROM drive units in which on-chip program memory is essential to meet performance
requirements, product start-up times are short, and program modifications may be necessary after
end-product assembly.
Rev. 4.00 Sep 27, 2006 page v of xliv
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