EO
Description
Features
HM5116405 Series
HM5117405 Series
16 M EDO DRAM (4-Mword
×
4-bit)
4 k Refresh/2 k Refresh
The HM5116405 Series, HM5117405 Series are CMOS dynamic RAMs organized 4,194,304-word
×
4-bit.
They employ the most advanced CMOS technology for high performance and low power. The
HM5116405 Series, HM5117405 Series offer Extended Data Out (EDO) Page Mode as a high speed
access mode. They have package variations of standard 26-pin plastic SOJ and standard 26-pin plastic
TSOP II.
•
Single 5 V (±10%)
•
Access time: 50 ns/60 ns/70 ns (max)
•
Power dissipation
Active mode : 495 mW/440 mW/385 mW (max) (HM5116405 Series)
: 550 mW/495 mW/440 mW (max) (HM5117405 Series)
Standby mode : 11 mW (max)
: 0.83 mW (max) (L-version)
•
EDO page mode capability
•
Long refresh period
4096 refresh cycles : 64 ms (HM5116405 Series)
: 128 ms (L-version)
2048 refresh cycles : 32 ms (HM5117405 Series)
: 128 ms (L-version)
•
3 variations of refresh
RAS-only
refresh
CAS-before-RAS
refresh
Hidden refresh
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
LP
E0151H10 (Ver. 1.0)
(Previous ADE-203-633D (Z))
Jul. 6, 2001 (K)
ro
du
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HM5116405 Series, HM5117405 Series
•
Battery backup operation (L-version)
•
Test function
16-bit parallel test mode
EO
Type No.
HM5116405S-5
HM5116405S-6
HM5116405S-7
HM5116405LS-5
HM5116405LS-6
HM5116405LS-7
HM5117405S-5
HM5117405S-6
HM5117405S-7
HM5117405LS-5
HM5117405LS-6
HM5117405LS-7
HM5116405TS-5
HM5116405TS-6
HM5116405TS-7
HM5116405LTS-5
HM5116405LTS-6
HM5116405LTS-7
HM5117405TS-5
HM5117405TS-6
HM5117405TS-7
HM5117405LTS-5
HM5117405LTS-6
HM5117405LTS-7
2
Ordering Information
Access time
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
300-mil 26-pin plastic TSOP II
(TTP-26/24DA)
Package
300-mil 26-pin plastic SOJ
(CP-26/24DB)
LP
Data Sheet E0151H10
ro
du
ct
HM5116405 Series, HM5117405 Series
EO
V
CC
I/O1
I/O2
WE
RAS
A11
A10
A0
A1
A2
A3
V
CC
Pin Arrangement
HM5116405S/LS Series
HM5116405TS/LTS Series
1
2
3
4
5
6
26
25
24
23
22
21
V
SS
I/O4
I/O3
CAS
OE
A9
V
CC
I/O1
I/O2
WE
RAS
A11
1
2
3
4
5
6
26
25
24
23
22
21
V
SS
I/O4
I/O3
CAS
OE
A9
Pin Description
Pin name
A0 to A11
Function
Address input
— Row/Refresh address A0 to A11
— Column address
A0 to A9
Data input/Data output
Row address strobe
Column address strobe
Write enable
Output enable
Power supply
Ground
LP
8
9
19
18
17
16
15
14
(Top view)
A8
A7
A6
A5
A4
10
11
12
13
V
SS
A10
A0
A1
A2
A3
V
CC
8
9
10
11
12
13
19
18
17
16
15
14
(Top view)
A8
A7
A6
A5
A4
V
SS
ro
du
ct
3
I/O1 to I/O4
RAS
CAS
WE
OE
V
CC
V
SS
Data Sheet E0151H10
HM5116405 Series, HM5117405 Series
Pin Arrangement
HM5117405S/LS Series
HM5117405TS/LTS Series
EO
V
CC
I/O1
I/O2
WE
RAS
NC
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
26
25
24
23
22
21
V
SS
I/O4
I/O3
CAS
OE
A9
V
CC
I/O1
I/O2
WE
RAS
NC
1
2
3
4
5
6
26
25
24
23
22
21
V
SS
I/O4
I/O3
CAS
OE
A9
Pin Description
Pin name
A0 to A10
Function
Address input
— Row/Refresh address A0 to A10
— Column address
A0 to A10
Data input/Data output
Row address strobe
Column address strobe
Write enable
Output enable
Power supply
Ground
No connection
LP
8
9
19
18
17
16
15
14
A8
A7
A6
A5
A4
10
11
12
13
V
SS
(Top view)
A10
A0
A1
A2
A3
8
9
10
11
12
13
19
18
17
16
15
14
A8
A7
A6
A5
A4
V
SS
ro
V
CC
(Top view)
du
ct
I/O1 to I/O4
RAS
CAS
WE
OE
V
CC
V
SS
NC
Data Sheet E0151H10
4
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