MULTILEVEL
PIPELINE REGISTERS
Integrated Device Technology, Inc.
IDT29FCT520AT/BT/CT/DT
IDT29FCT521AT/BT/CT/DT
FEATURES:
•
•
•
•
A, B, C and D speed grades
Low input and output leakage
≤1µA
(max.)
CMOS power levels
True TTL input and output compatibility
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, SSOP, QSOP, CERPACK and
LCC packages
DESCRIPTION:
The IDT29FCT520AT/BT/CT/DT and IDT29FCT521AT/
BT/CT/DT each contain four 8-bit positive edge-triggered
registers. These may be operated as a dual 2-level or as a
single 4-level pipeline. A single 8-bit input is provided and any
of the four registers is available at the 8-bit, 3-state output.
These devices differ only in the way data is loaded into and
between the registers in 2-level operation. The difference is
illustrated in Figure 1. In the IDT29FCT520AT/BT/CT/DT
when data is entered into the first level (I = 2 or I = 1), the
existing data in the first level is moved to the second level. In
the IDT29FCT521AT/BT/CT/DT, these instructions simply
cause the data in the first level to be overwritten. Transfer of
data to the second level is achieved using the 4-level shift
instruction (I = 0). This transfer also causes the first level to
change. In either part I=3 is for hold.
•
•
•
•
•
FUNCTIONAL BLOCK DIAGRAM
D
0
-D
7
8
MUX
I
0
,I
1
2
REGISTER
CONTROL
CLK
1
OCTAL REG. A1
OCTAL REG. B1
OCTAL REG. A2
OCTAL REG. B2
S
0
,S
1
2
MUX
OE
8
2619 drw 01
Y
0
-Y
7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1994
Integrated Device Technology, Inc.
APRIL 1994
DSC-4215/4
6.2
1
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
I
0
I
1
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CLK
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
P24-1
D24-1
SO24-2
SO24-7
SO24-8*
&
E24-1
21
20
19
18
17
16
15
14
13
D
7
CLK
GND
NC
OE
Y
7
Y
6
Vcc
S
0
S
1
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
OE
2619 drw 02
INDEX
D
0
I
1
I
0
NC
Vcc
S
0
S
1
4
3
2
1
28 27 26
25
24
23
5
6
7
8
9
10
D
1
D
2
D
3
NC
D
4
D
5
D
6
L28-1
22
21
20
11
19
12 13 14 15 16 17 18
Y
0
Y
1
Y
2
NC
Y
3
Y
4
Y
5
2619 drw 03
*FCT520 only
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
LCC
TOP VIEW
DEFINITION OF FUNCTIONAL TERMS
Pin Names
D
n
CLK
I
0
, I
1
S
0
, S
1
Description
Register input Port.
Clock input. Enter data into registers on LOW-
to-HIGH transitions.
Instruction inputs. See Figure 1 and
struction Control Tables.
in-
REGISTER SELECTION
S
1
0
0
1
1
S
0
0
1
0
1
Register
B
2
B
1
A
2
A
1
2619 tbl 02
Multiplexer select. Inputs either register A
1
, A
2
,
B
1
or B
2
data to be available at the output port.
Output enable for 3-state output port.
Register output port.
2619 tbl 01
OE
Y
n
DUAL 2-LEVEL
SINGLE 4-LEVEL
A
1
IDT29FCT520T
A
2
B
1
A
1
B
1
A
1
B
1
B
2
A
2
B
2
A
2
B
2
I=2
I=1
I=0
A
1
IDT29FCT521T
A
2
B
1
A
1
B
1
A
1
B
1
B
2
A
2
B
2
A
2
B
2
I=2
I=1
I=0
NOTE:
1. I = 3 for hold.
Figure 1. Data Loading in 2-Level Operation
2619 drw 04
6.2
2
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Commercial
V
TERM(2)
Terminal Voltage
–0.5 to +7.0
with Respect to
GND
(3)
Terminal Voltage
V
TERM
–0.5 to
with Respect to
V
CC
+0.5
GND
T
A
Operating
0 to +70
Temperature
T
BIAS
Temperature
–55 to +125
Under Bias
T
STG
Storage
–55 to +125
Temperature
P
T
Power Dissipation
0.5
I
OUT
DC Output
Current
–60 to +120
Military
–0.5 to +7.0
Unit
V
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
Parameter
(1)
C
IN
Input
Capacitance
C
OUT
Output
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max. Unit
10
pF
12
pF
2619 lnk 04
–0.5 to
V
CC
+0.5
–55 to +125
–65 to +135
–65 to +150
0.5
–60 to +120
V
°C
°C
°C
W
mA
NOTE:
1. This parameter is measured at characterization but not tested.
2619 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
V
CC
by +0.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V
±
5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V
±
10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
I
V
IK
I
OS
V
OH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
High Impedance
(4)
Output Current
Input HIGH Current
(4)
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
N
= –18mA
V
CC
= Max. , V
O
= GND
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= –6mA MIL.
I
OH
= –8mA COM’L.
I
OH
= –12mA MIL.
I
OH
= –15mA COM’L.
(3)
Min.
2.0
—
Typ.
(2)
—
—
—
—
—
—
—
–0.7
–120
3.3
3.0
0.3
200
0.01
Max.
—
0.8
±1
±1
±1
±1
±1
–1.2
–225
—
—
0.5
—
1
Unit
V
V
µA
µA
µA
µA
V
mA
V
V
I
= 2.7V
V
I
= 0.5V
V
O
= 2.7V
V
O
= 0.5V
—
—
—
—
—
—
–60
2.4
2.0
—
—
—
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
OL
V
H
I
CC
Output LOW Voltage
Input Hysteresis
Quiescent Power
Supply Current
V
CC
= Min.
V
IN
= V
IH
or V
IL
—
V
CC
= Max.
V
IN
= GND or V
CC
I
OL
= 32mA MIL.
I
OL
= 48mA COM’L.
V
mV
mA
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is
±5µA
at T
A
= -55°C.
2619 tbl 05
6.2
3
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply
Current, TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max., Outputs Open
OE
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max., Outputs Open
f
CP
= 10MHz
50% Duty Cycle
OE
= GND
One Bit Toggling
at f
i
= 5MHz
50% Duty Cycle
V
CC
= Max., Outputs Open
f
CP
= 10MHz
50% Duty Cycle
OE
= GND
Eight Bits Toggling
at f
i
= 2.5MHz
50% Duty Cycle
V
IN
= V
CC
V
IN
= GND
Min.
—
—
Typ.
(2)
0.5
0.15
Max.
2.0
0.25
Unit
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
—
1.5
3.5
mA
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
—
2.0
5.5
—
3.8
7.3
(5)
V
IN
= 3.4V
V
IN
= GND
—
6.0
16.3
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL HIgh Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
2619 tbl 06
6.2
4
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT520AT/521AT
Com'l.
Symbol
t
PHL
t
PLH
t
PHL
t
PLH
t
SU
t
H
t
SU
t
H
t
PHZ
t
PLZ
t
PZH
t
PZL
t
W
Parameter
Propagation Delay
CLK to Yn
Propagation Delay
S
0
or S
1
to Yn
Set-up Time, HIGH or LOW
Dn to CLK
Hold Time, HIGH or LOW
Dn to CLK
Set-up Time, HIGH or LOW
I
0
or I
1
to CLK
Hold Time, HIGH or LOW
I
0
or I
1
to CLK
Output Disable Time
Output Enable Time
Clock Pulse Width
HIGH or LOW
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
Min
.
(2)
2.0
2.0
5.0
2.0
5.0
2.0
1.5
1.5
7.0
Max.
14.0
13.0
—
—
—
—
12.0
15.0
—
Mil.
Min
.
(2)
2.0
2.0
6.0
2.0
6.0
2.0
1.5
1.5
8.0
Max.
16.0
15.0
—
—
—
—
13.0
16.0
—
FCT520BT/521BT
Com'l.
Min
.
(2)
2.0
2.0
2.5
2.0
4.0
2.0
1.5
1.5
5.5
Max.
7.5
7.5
—
—
—
—
7.0
7.5
—
Mil.
Min
.
(2)
2.0
2.0
2.8
2.0
4.5
2.0
1.5
1.5
6.0
Max.
8.0
8.0
—
—
—
—
7.5
8.0
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
2619 tbl 07
FCT520CT/521CT
Com'l.
Symbol
t
PHL
t
PLH
t
PHL
t
PLH
t
SU
t
H
t
SU
t
H
t
PHZ
t
PLZ
t
PZH
t
PZL
t
W
Parameter
Propagation Delay
CLK to Yn
Propagation Delay
S
0
or S
1
to Yn
Set-up Time, HIGH or LOW
Dn to CLK
Hold Time, HIGH or LOW
Dn to CLK
Set-up Time, HIGH or LOW
I
0
or I
1
to CLK
Hold Time, HIGH or LOW
I
0
or I
1
to CLK
Output Disable Time
Output Enable Time
Clock Pulse Width
HIGH or LOW
(3)
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
Min
.
(2)
2.0
2.0
2.5
2.0
4.0
2.0
1.5
1.5
5.5
Max.
6.0
6.0
—
—
—
—
6.0
6.0
—
Mil.
Min
.
(2)
2.0
2.0
2.8
2.0
4.5
2.0
1.5
1.5
6.0
Max.
7.0
7.0
—
—
—
—
6.0
7.0
—
FCT520DT/521DT
Com'l.
Min
.
(2)
2.0
2.0
1.5
1.0
2.0
1.0
1.5
1.5
3.0
Max.
5.2
4.8
—
—
—
—
4.8
4.0
—
Mil.
Min
.
(2)
—
—
—
—
—
—
—
—
—
Max.
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
2619 tbl 08
NOTES:
1. See test circuit and waveforms.
2. Minimum units are guaranteed but not tested on Propagation Delays.
6.2
5
DSP 与 ARM 处理器
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
