根据文件内容，American Microsystems, Inc.（AMI）提供的定制频率选择服务允许客户根据特定需求定制PLL（Phase-Locked Loop，相位锁定环）的频率。客户可以通过联系他们当地的AMI销售代表来获取更多关于定制频率选择的信息。文件中提到了“Custom frequency selections available - contact your local AMI Sales Representative for more information”，意味着客户需要主动与AMI的销售代表联系，以讨论他们的需求和可能的定制选项。
Output Power Supply (must be less than or equal to VDD)
No Connection
No Connection
No Connection
DO
3.0
3.1
Functional Block Description
Phase-Locked Loop (PLL)
The on-chip PLL is a standard frequency- and phase-
locked loop architecture. The PLL multiplies the reference
oscillator to the desired frequency by a ratio of integers.
The frequency multiplication is exact with a zero synthe-
sis error.
3.2
Voltage-Controlled Crystal
Oscillator (VCXO)
the effective load capacitance presented to the crystal by
the oscillator circuit. The actual amount that changing the
load capacitance alters the oscillator frequency will be
dependent on the characteristics of the crystal as well as
the oscillator circuit itself.
Specifically, the motional capacitance of the crystal (usu-
ally referred to by crystal manufacturers as C
1
), the static
capacitance of the crystal (C
0
), and the load capacitance
(C
L
) of the oscillator determine the “warping” or “pulling”
capability of the crystal in the oscillator circuit.
A simple formula to obtain the warping capability of a
crystal oscillator is:
6
C
1
×
(
C
L
2
−
C
L
1
)
×
10
∆
f
(
ppm
)
=
2
×
(
C
0
+
C
L
2
)
×
(
C
0
+
C
L
1
)
The VCXO provides a tunable, low-jitter frequency refer-
ence for the rest of the FS6146 system components.
Loading capacitance for the crystal is internal to the
FS6146. No external components (other than the crystal
resonator itself) are required for operation of the VCXO.
Continuous fine-tuning of the VCXO frequency is accom-
plished by varying the voltage on the XTUNE pin.
The oscillator operates the crystal resonator in the paral-
lel-resonant mode. Crystal warping, or the “pulling” of the
crystal oscillation frequency, is accomplished by altering
2
where C
L1
and C
L2
are the two extremes of the applied
load capacitance.
EXAMPLE: A crystal with the following parameters is
used. With C
1
= 0.02pF, C
0
= 5pF, C
L1
= 10pF, and C
L2
=
22.66pF, the tuning range is
0
.
02
×
(
22
.
66
−
10
)
×
10 6
∆
f
=
=
305
ppm
.
2
×
(
5
+
22
.
66
)
×
(
5
+
10
)
ISO9001
2.27.02
FS6146
VCXO Clock Generator IC
4.0
Electrical Specifications
Table 3: Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at
these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for extended conditions may affect device performance,
functionality, and reliability.
PARAMETER
Supply Voltage (V
SS
= ground)
Input Voltage, dc
Output Voltage, dc
Input Clamp Current, dc (V
I
< 0 or V
I
> V
DD
)
Output Clamp Current, dc (V
I
< 0 or V
I
> V
DD
)
Storage Temperature Range (non-condensing)
Ambient Temperature Range, Under Bias
Junction Temperature
Lead Temperature (soldering, 10s)
Input Static Discharge Voltage Protection (MIL-STD 883E, Method 3015.7)
SYMBOL
V
DD
V
I
V
O
I
IK
I
OK
T
S
T
A
T
J
MIN.
V
SS
-0.5
V
SS
-0.5
V
SS
-0.5
-50
-50
-65
-55
MAX.
7
V
DD
+0.5
V
DD
+0.5
50
50
150
125
125
260
2
UNITS
V
V
V
mA
mA
°C
°C
°C
°C
kV
CAUTION: ELECTROSTATIC SENSITIVE DEVICE
Permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy elec-
trostatic discharge.
Table 4: Operating Conditions
PARAMETER
Supply Voltage
Ambient Operating Temperature Range
Crystal Resonator Frequency
Crystal Resonator Motional Capacitance
Crystal Loading Capacitance
SYMBOL
V
DD
T
A
f
XTAL
C
1(xtal)
C
L(xtal)
Fundamental Mode
AT cut
AT cut
CONDITIONS/DESCRIPTION
5V ± 5%
MIN.
4.75
0
5
13.5
25
14
TYP.
5
MAX.
5.25
70
18
UNITS
V
°C
MHz
fF
pF
3
ISO9001
2.27.02
FS6146
VCXO Clock Generator IC
Table 5: DC Electrical Specifications
Unless otherwise stated, V
DD
= 5V ± 10%, no load on any output, and ambient temperature range T
A
= 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization data
and are not production tested to any specific limits. Where given, MIN and MAX characterization data are
±
3σ from typical. Negative currents indicate current flows out of the device.
PARAMETER
Overall
Supply Current, Dynamic, with Loaded
Outputs
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP.
MAX.
UNITS
I
DD
f
XTAL
= 13.5MHz; C
L
= 10pF
20
mA
Voltage Controlled Crystal Oscillator - VDD=5.0V
Crystal Loading Capacitance
Crystal Resonator Motional Capacitance
VCXO Tuning Range
VCXO Tuning Characteristic
Crystal Drive Level
Clock Outputs (CLKA, CLKB) - VDDO=3.3V
High-Level Output Source Current *
Low-Level Output Sink Current *
Output Impedance *
Short Circuit Source Current *
Short Circuit Sink Current *
I
OH
I
OL
z
OH
z
OL
I
OSH
I
OSL
V
O
= 2.0V
V
O
= 0.4V
V
O
= 0.1V
DD
; output driving high
V
O
= 0.1V
DD
; output driving low
V
O
= 0V; shorted for 30s, max.
V
O
= 5V; shorted for 30s, max.
-40
17
25
25
-55
55
mA
mA
Ω
mA
mA
C
L(xtal)
C
1(xtal)
As seen by a crystal connected to XIN and
XOUT (@ V
XTUNE
= 1.65V)
AT cut
f
XTAL
= 13.5MHz; C
L(xtal)
= 14pF; C
1(xtal)
= 25fF
14
25
300
100
200
pF
fF
ppm
ppm/V
uW
Note: positive
∆F
for positive
∆V
R
XTAL
=20Ω; C
L(xtal)
= 14pF
Table 6: AC Timing Specifications
Unless otherwise stated, V
DD
= 5V ± 10%, no load on any output, and ambient temperature range T
A
= 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization data
and are not production tested to any specific limits. Where given, MIN and MAX characterization data are
±
3σ from typical.
PARAMETER
Overall
VCXO Stabilization Time *
PLL Stabilization Time *
Output Frequency Synthesis Error
Clock Output (CLK)
Duty Cycle *
Jitter, Period (peak-peak) *
Jitter, Long Term (σ
y
(τ)) *
Rise Time *
Fall Time *
SYMBOL
CONDITIONS/DESCRIPTION
CLOCK
(MHz)
MIN.
TYP.
MAX.
UNITS
t
VCXOSTB
t
PLLSTB
From power valid
From VCXO stable
(unless otherwise noted in Frequency Table)
10
500
0
ms
us
ppm
Ratio of high pulse width (as measured from rising edge
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