TDA8029
Low power single card reader
Rev. 03 — 22 February 2005
Product data sheet
1. General description
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader. Its
different power reduction modes and its wide supply voltage range allow its use in
portable equipment. Due to specific versatile hardware, a small embedded software
program allows the control of most cards available in the market. The control from the host
may be done through a standard serial interface.
The TDA8029 may be delivered with standard embedded software, or be masked with
specific customer code. For details on software development and on available tools,
please refer to application notes
“AN01009”
and
“AN10134”
for the TDA8029HL/C1. For
standard embedded software, please refer to
“AN10206”
for the TDA8029HL/C2.
2. Features
s
80C51 core with 16 kB ROM, 256 byte RAM and 512 byte XRAM
s
Specific ISO7816 UART, accessible with MOVX instructions for automatic convention
processing, variable baud rate, error management at character level for T = 0 and
T = 1 protocols, extra guard time, etc.
s
Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing
during Answer To Reset (ATR) and for T = 1 protocol
s
V
CC
generation with controlled rise and fall times:
x
5 V
±
5 %, maximum current 65 mA
x
3 V
±
5 %, maximum current 50 mA; maximum current 65 mA if V
DD
> 3 V
x
1.8 V
±
5 %, maximum current 30 mA
s
Card clock generation up to 20 MHz with three times synchronous frequency doubling
(f
XTAL
,
1
⁄
2
f
XTAL
,
1
⁄
4
f
XTAL
and
1
⁄
8
f
XTAL
)
s
Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power
reduction modes
s
Automatic activation and deactivation sequences through an independent sequencer
s
Supports asynchronous protocols T = 0 and T = 1 in accordance with:
x
ISO 7816
and
EMV 3.1.1
(TDA8029HL/C1 and TDA8029HL/C2)
x
ISO 7816
and
EMV 2000
(TDA8029HL/C2).
s
1 to 8 characters FIFO in reception mode
s
Parity error counter in reception mode and in transmission mode with automatic
retransmission
s
Versatile 24-bit time-out counter for ATR and waiting times processing
s
Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in
T = 0)
Philips Semiconductors
TDA8029
Low power single card reader
s
Minimum delay between two characters in reception mode:
x
In protocol T = 0:
12 ETU (TDA8029HL/C1)
11.8 ETU (TDA8029HL/C2).
x
In protocol T = 1:
11 ETU (TDA8029HL/C1)
10.8 ETU (TDA8029HL/C2).
s
Supports synchronous cards which do not use C4/C8
s
Current limitations on card contacts
s
Supply supervisor for power-on/off reset and spikes killing
s
DC-to-DC converter (supply voltage from 2.7 to 6 V), doubler, tripler or follower
according to V
CC
and V
DD
s
Shut-down input for very low power consumption
s
Enhanced ESD protection on card contacts (6 kV minimum)
s
Software library for easy integration
s
Communication with the host through a standard full duplex serial link at
programmable baud rates
s
One external interrupt input and four general purpose I/Os.
3. Applications
s
Portable card readers
s
General purpose card readers
s
EMV compliant card readers.
4. Quick reference data
Table 1:
Symbol
V
DD
V
DCIN
I
DD(sd)
I
DD(pd)
Quick reference data
Parameter
supply voltage
NDS conditions
input voltage for the
DC-to-DC converter
supply current in Shut-down V
DD
= 3.3 V
mode
supply current in
Power-down mode
supply current in Sleep
mode
V
DD
= 3.3 V; card inactive;
microcontroller in
Power-down mode
V
DD
= 3.3 V; card active at
V
CC
= 5 V; clock stopped;
microcontroller in
Power-down mode;
I
CC
= 0 A
I
CC
= 65 mA;
f
XTAL
= 20 MHz;
f
CLK
= 10 MHz; 5 V card;
V
DD
= 2.7 V
Conditions
Min
2.7
3
V
DD
-
-
Typ
-
-
-
-
-
Max Unit
6.0
6.0
6.0
20
110
V
V
V
µA
µA
I
DD(sl)
-
-
800
µA
I
DD(om)
supply current in operating
mode
-
-
250
mA
9397 750 14145
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 22 February 2005
2 of 59
Philips Semiconductors
TDA8029
Low power single card reader
Quick reference data
…continued
Parameter
card supply voltage
Conditions
active mode; I
CC
< 65 mA;
5 V card
active mode; I
CC
< 65 mA if
V
DD
> 3.0 V else
I
CC
< 50 mA; 3 V card
active mode; I
CC
< 30 mA;
1.8 V card
active mode; current pulses
of 40 nAs with I < 200 mA,
t < 400 ns, f < 20 MHz; 5 V
card
active mode; current pulses
of 40 nAs with I < 200 mA,
t < 400 ns, f < 20 MHz; 3 V
card
active mode; current pulses
of 12 nAs with I < 200 mA,
t < 400 ns, f < 20 MHz;
1.8 V card
Min
Typ
Max Unit
5.25 V
3.20 V
4.75 5
2.80 3
Table 1:
Symbol
V
CC
1.62 1.8
4.6
-
1.98 V
5.3
V
2.75 -
3.25 V
1.62 -
1.98 V
I
CC
card supply current
5 V card; V
CC
= 0 V to 5 V
3 V card; V
CC
= 0 V to 3 V;
V
DD
> 3.0 V
3 V card; V
CC
= 0 V to 3 V;
V
DD
< 3.0 V
1.8 V card; V
CC
= 0 V to
1.8 V;
-
-
-
-
-
-
-
-
-
100
65
65
50
30
-
mA
mA
mA
mA
mA
I
CC(det)
overload detection current
maximum load capacitor
300 nF
SR
r
, SR
f
rise and fall slew rate on
V
CC
t
de
t
act
f
XTAL
deactivation sequence
duration
activation sequence
duration
crystal frequency
0.05 0.16 0.22 V/µs
-
-
-
-
-
-
-
-
100
225
27
16
27
+90
µs
µs
MHz
MHz
MHz
°C
V
DD
= 5 V
V
DD
< 3 V
external input
4
4
0
−40
T
amb
ambient temperature
5. Ordering information
Table 2:
Ordering information
Package
Name
TDA8029HL/C1
TDA8029HL/C2
LQFP32
Description
plastic low profile quad flat package; 32 leads;
body 7
×
7
×
1.4 mm
Version
SOT358-1
Type number
9397 750 14145
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 22 February 2005
3 of 59
Philips Semiconductors
TDA8029
Low power single card reader
6. Block diagram
V
DD
CDEL
6
RESET
SDWN_N
28
5
SUPPLY
SUPERVISOR
DC-to-DC
CONVERTER
CLOCK
CIRCUITRY
80C51
CONTROLLER
16 kB ROM
256 byte RAM
TIMER 2
18
16
P16
P17
P27
P26
P30/RX
P31/TX
EA_N
ALE
PSEN_N
2
1
24
25
32
31
21
P00/P07
22
P20
23
ISO 7816
UART
ANALOG
DRIVERS
AND
SEQUENCER
3
SAM
19
SAP SBM
14
17
SBP
15
13
VUP
220 nF
P33/INT1_N
30
PGND
DCIN
10
µF
24-bit
ETU
COUNTER
11
9
VCC
GNDC
12
10
7
P37
P25
RST
CLK
I/O
PRES
29
P32/INT0_N
CS
8
TEST
20
512 byte XRAM
27
26
CRYSTAL
OSCILLATOR
CONTROL/
STATUS
REGISTERS
INTERNAL
OSCILLATOR
XTAL2
XTAL1
TDA8029
4
fce869
GND
Fig 1. Block diagram
9397 750 14145
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 22 February 2005
4 of 59
Philips Semiconductors
TDA8029
Low power single card reader
7. Pinning information
7.1 Pinning
29 P32/INT0_N
30 P33/INT1_N
32 P30/RX
31 P31/TX
28 RESET
27 XTAL2
26 XTAL1
P17
P16
V
DD
GND
SDWN_N
CDEL
I/O
PRES
1
2
3
4
5
6
7
8
CLK 10
V
CC
11
RST 12
VUP 13
SAP 14
SBP 15
DCIN 16
9
25 P26
24 P27
23 PSEN_N
22 ALE
21 EA_N
20 TEST
19 SAM
18 PGND
17 SBM
001aac157
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
TDA8029HL
Fig 2. Pin configuration
7.2 Pin description
Table 3:
Symbol
P17
P16
V
DD
GND
SDWN_N
CDEL
I/O
PRES
Pin description
Pin
1
2
3
4
5
6
7
8
Type
I/O
I/O
power
power
I
I
I/O
I
Description
general purpose I/O
general purpose I/O
supply voltage
ground connection
shut-down signal input (active LOW, no internal pull-up)
connection for an external capacitor determining the
power-on reset pulse width (typically 1 ms per 2 nF)
data input/output to/from the card (C7); 14 kΩ integrated
pull-up resistor to V
CC
card presence detection contact (active HIGH); do not
connect to any external pull-up or pull-down resistor; use
with a normally open presence switch (see details in
Section 8.13)
card ground (C5); connect to GND in the application
clock to the card (C3)
card supply voltage (C1)
card reset (C2)
output of the DC-to-DC converter (low ESR 220 nF to
PGND)
GNDC
CLK
V
CC
RST
VUP
9
10
11
12
13
power
O
O
O
power
9397 750 14145
Product data sheet
Rev. 03 — 22 February 2005
GNDC
5 of 59
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
