2SK4017
TOSHIBA Field Effect Transistor
Silicon N-Channel MOS Type (U-MOS III)
2SK4017
Chopper Regulator, DC/DC Converter and Motor Drive
Applications
６．５±０．２
５．２±０．２
１．５±０．２
Unit: mm
０．６ MAX．
１．６
Low drain−source ON-resistance
High forward transfer admittance
Low leakage current
Enhancement mode
: R
DS (ON)
= 0.07
Ω
(typ.)
: |Y
fs
| = 6.0 S (typ.)
０．９
５．５±０．２
4 V gate drive
１．１±０．２
４．１±０．２
: I
DSS
= 100
μA
(max) (V
DS
= 60 V)
: V
th
= 0.8~2.0 V (V
DS
= 10 V, I
D
= 1 mA)
１
２．３
２．３
５．７
０．６ MAX
Absolute Maximum Ratings
(Ta = 25°C)
０．８ MAX．
２
３
０．６±０．１５
０．６±０．１５
Characteristic
Drain−source voltage
Drain−gate voltage (R
GS
= 20 kΩ)
Gate−source voltage
Drain current
DC
(Note 1)
Symbol
V
DSS
V
DGR
V
GSS
I
D
I
DP
P
D
E
AS
I
AR
E
AR
T
ch
T
stg
Rating
60
60
±20
5
20
20
40.5
5
2
150
−55~150
Unit
V
V
V
A
A
W
mJ
A
mJ
°C
°C
１．1 MAX．
２．３±０．２
JEDEC
JEITA
TOSHIBA
⎯
⎯
2-7B2B
Pulse (Note 1)
Drain power dissipation (Tc = 25°C)
Single-pulse avalanche energy
(Note 2)
Avalanche current
Repetitive avalanche energy (Note 3)
Channel temperature
Storage temperature range
Weight: 0.36 g (typ.)
Note:
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate
reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and
Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
Thermal Characteristics
Characteristic
Thermal resistance, channel to case
Thermal resistance, channel to
ambient
Symbol
R
th (ch−c)
R
th (ch−a)
Max
6.25
125
Unit
°C / W
°C / W
Note 1: Ensure that the channel temperature does not exceed 150°C.
Note 2: V
DD
= 25 V, T
ch
= 25°C (initial), L = 2.2 mH, R
G
= 25
Ω,
I
AR
= 5 A
Note 3: Repetitive rating: pulse width limited by maximum channel temperature
This transistor is an electrostatic-sensitive device. Handle with care.
1
2006-11-20
2SK4017
Electrical Characteristics
(Ta = 25°C)
Characteristic
Gate leakage current
Drain cutoff current
Drain−source breakdown
voltage
Gate threshold voltage
Drain−source ON-resistance
Forward transfer admittance
Input capacitance
Reverse transfer capacitance
Output capacitance
Rise time
Symbol
I
GSS
I
DSS
V
(BR) DSS
V
th
R
DS (ON)
|Y
fs
|
C
iss
C
rss
C
oss
t
r
t
on
t
f
t
off
Q
g
Q
gs
Q
gd
V
DD
≈
48 V, V
GS
= 10 V, I
D
= 5 A
V
DS
= 10 V, V
GS
= 0 V, f = 1 MHz
Test Condition
V
GS
= ±16 V, V
DS
= 0 V
V
DS
= 60 V, V
GS
= 0 V
I
D
= 10 mA, V
GS
= 0 V
V
DS
= 10 V, I
D
= 1 mA
V
GS
= 4 V, I
D
= 2.5 A
V
GS
= 10 V, I
D
= 2.5 A
V
DS
= 10 V, I
D
= 2.5 A
Min
—
—
60
1.3
—
—
3.0
—
—
—
—
Typ.
—
—
—
—
0.09
0.07
6.0
730
60
95
10
Max
±10
100
—
2.5
0.15
0.10
—
—
—
—
—
pF
Unit
μA
μA
V
V
Ω
S
Turn−on time
Switching time
Fall time
—
20
—
ns
—
4
—
Turn−off time
Total gate charge (gate−source
plus gate−drain)
Gate−source charge
Gate−drain (“Miller”) charge
—
—
—
—
35
15
11
4
—
—
—
—
nC
Source−Drain Ratings and Characteristics
(Ta = 25°C)
Characteristic
Continuous drain reverse current
(Note 1)
Pulse drain reverse current
(Note 1)
Forward voltage (diode)
Reverse recovery time
Reverse recovery charge
Symbol
I
DR
I
DRP
V
DSF
t
rr
Q
rr
I
DR
= 5 A, V
GS
= 0 V
I
DR
= 5 A, V
GS
= 0 V, dI
DR
/ dt = 50 A /
μs
Test Condition
—
—
Min
—
—
—
—
—
Typ.
—
—
—
34
28
Max
5
20
−1.7
—
—
Unit
A
A
V
ns
μC
Marking
K4017
Part No. (or abbreviation code)
Lot No.
A line indicates
lead (Pb)-free package or
lead (Pb)-free finish.
2
2006-11-20
2SK4017
R
DS (ON)
−
Ta
0.2
Common source
Pulse test
10
I
DR
−
V
DS
Drain reverse current IDR (A)
Drain-source ON-resistance
RDS
(ON)
(Ω)
10
5
3
1
1
VGS
=
0 V
0.15
ID
=
5A
2.5
0.1
VGS
=
4 V
5
1.2
2.5
1.2
0.05
VGS
=
10 V
Common source
Tc
=
25°C
Pulse test
0.1
0
−0.2
−0.4
−0.6
−0.8
−1.0
−1.2
0
−80
−40
0
40
80
120
160
Ambient temperature Ta (°C)
Drain-source voltage
VDS
(V)
Capacitance – V
DS
10000
Common source
VGS
=
0 V
f
=
1 MHz
Tc
=
25°C
1000
2.2
2.6
V
th
−
Tc
Common source
VDS
=
10 V
ID
=
1mA
Pulse test
(pF)
Gate threshold voltage
Vth (V)
Ciss
Capacitance C
1.8
Coss
100
1.4
Crss
10
0.1
1
−80
1
10
100
−40
0
40
80
120
160
Drain-source voltage
VDS
(V)
Case temperature Tc (°C)
Dynamic input / output
characteristics
50
VDS
40
VGS
30
12V
24V
20
Common source
10
VDD
=
48V
I
D
=
5 A
Tc
=
25°C
Pulse test
0
0
5
10
15
20
25
30
0
5
10
15
20
25
PD
VDS
Drain power dissipation
Case temperature Tc (°C)
Drain-source voltage
Total gate charge Qg (nC)
4
2006-11-20
Gate-source voltage
VGS (V)
(W)
(V)
2SK4017
r
th
−
t
w
Normalized transient thermal impedance
r
th (t)
/R
th (ch-c)
10
1
Duty
=
0.5
0.2
0.1
Single Pulse
PDM
0.05
0.02
0.01
t
T
Duty
=
t/T
Rth (ch-c)
=
6.25°C/W
100
μ
1m
10 m
100 m
1
10
0.1
0.01
10
μ
Pulse width
t
w
(s)
SAFE OPERATING AREA
100
50
E
AS
– T
ch
E
AS
(mJ)
Avalanche energy
I
D
max (pulse)*
Drain current ID
(A)
10
I
D
max (continuous)
1 ms
*
100
μs
*
40
DC OPERATION
T
C
=25°C
1
30
20
10
0.1
* Single pulse
Tc = 25
°C
Curves must be derated linearly
with increase in temperature.
0
25
VDSS max
10
100
50
75
100
125
150
Channel temperature (initial)
T
ch
(°C)
0.01
0.1
1
Drain-source voltage
VDS
(V)
15 V
0V
B
VDSS
I
AR
V
DD
V
DS
Waveform
Ε
AS
=
⎛
⎞
1
B VDSS
⎟
⋅
L
⋅
I2
⋅ ⎜
⎜
B
2
−
VDD
⎟
⎝
VDSS
⎠
Test circuit
R
G
=
25
Ω
V
DD
=
25 V, L
=
2.2 mH
5
2006-11-20
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