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CY7C107D

CY7C1007D

1-Mbit (1M x 1) Static RAM

Features

■

Functional Description

[1]

The CY7C107D and CY7C1007D are high-performance CMOS

static RAMs organized as 1,048,576 words by 1 bit. Easy

memory expansion is provided by an active LOW Chip Enable

(CE) and tri-state drivers. These devices have an automatic

power-down feature that reduces power consumption by more

than 65% when deselected. The output pin (D

OUT

) is placed in a

high-impedance state when:

■

Pin- and function-compatible with CY7C107B/CY7C1007B

High speed

— t

AA

= 10 ns

Low active power

— I

CC

= 80 mA @ 10 ns

■

Low complementary metal oxide semiconductor (CMOS)

standby power

— I

SB2

= 3 mA

Deselected (CE HIGH)

When the write operation is active (CE and WE LOW)

■

2.0 V data retention

Automatic power-down when deselected

CMOS for optimum speed/power

Transistor transistor logic (TTL) compatible inputs and outputs

CY7C107D available in Pb-free 28-pin 400-Mil wide Molded

SOJ package. CY7C1007D available in Pb-free 28-pin 300-Mil

wide Molded SOJ package

Write to the device by taking Chip Enable (CE) and Write Enable

(WE) inputs LOW. Data on the input pin (D

IN

) is written into the

memory location specified on the address pins (A

0

through A

19

).

Read from the device by taking Chip Enable (CE) LOW while

while forcing Write Enable (WE) HIGH. Under these conditions,

the contents of the memory location specified by the address

pins appears on the data output (D

OUT

) pin.

Logic Block Diagram

DIN

A0

A1

A2

A3

A4

A5

A6

A7

A8

CE

WE

INPUT BUFFER

ROW DECODER

1M x 1

ARRAY

SENSE AMPS

DOUT

COLUMN DECODER

POWER

DOWN

Note

1. For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at

www.cypress.com.

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

Cypress Semiconductor Corporation

Document #: 38-05469 Rev. *H

•

198 Champion Court

•

San Jose

,

CA 95134-1709

•

408-943-2600

Revised April 7, 2011

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CY7C107D

CY7C1007D

Contents

Pin Configuration ............................................................. 3

Selection Guide ................................................................ 3

Maximum Ratings ............................................................. 4

Operating Range ............................................................... 4

Electrical Characteristics.................................................. 4

Capacitance ....................................................................... 5

Thermal Resistance........................................................... 5

AC Test Loads and Waveforms ....................................... 5

Switching Characteristics.................................................

6

Data Retention Characteristics ........................................ 7

Data Retention Waveform ................................................ 7

Switching Waveforms ...................................................... 7

Truth Table ........................................................................ 8

Ordering Information ........................................................ 9

Ordering Code Definitions ........................................... 9

Package Diagrams .......................................................... 10

Acronyms ........................................................................ 12

Document Conventions ................................................. 12

Units of Measure ....................................................... 12

Document History Page ................................................. 13

Sales, Solutions, and Legal Information ...................... 14

Worldwide Sales and Design Support ....................... 14

Products .................................................................... 14

PSoC Solutions ......................................................... 14

Document #: 38-05469 Rev. *H

Page 2 of 14

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CY7C107D

CY7C1007D

Pin Configuration

[2]

SOJ

Top View

A

10

A

11

A

12

A

13

A

14

A

15

NC

A

16

A

17

A

18

A

19

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

V

CC

A

9

A

8

A

7

A

6

A

5

A

4

NC

A

3

A

2

A

1

A

0

D

IN

CE

D

OUT

WE

GND

Selection Guide

CY7C107D-10

CY7C1007D-10

Maximum access time

Maximum operating current

Maximum CMOS standby current, I

SB2

10

80

3

Unit

ns

mA

Note

2. NC pins are not connected on the die.

Document #: 38-05469 Rev. *H

Page 3 of 14

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CY7C1007D

Maximum Ratings

Exceeding the maximum ratings may impair the useful life of the

device. These user guidelines are not tested.

Storage temperature

65

°C to +150 °C

Ambient temperature with

power applied55 °C to +125 °C

Supply voltage on V

CC

relative to GND

[3]

 0.5

V to +6.0 V

DC voltage applied to outputs

in High-Z state

[3]

 0.5

V to V

CC

+ 0.5 V

DC input voltage

[3]

 0.5

V to V

CC

+ 0.5 V

Current into outputs (LOW) ......................................... 20 mA

Static discharge voltage........................................... > 2001 V

(per MIL-STD-883, Method 3015)

Latch-up current ..................................................... > 200 mA

Operating Range

Range

Industrial

Ambient

Temperature

–40 °C to +85 °C

V

CC

5 V



0.5 V

Speed

10 ns

Electrical Characteristics

(Over the Operating Range)

Parameter

V

OH

V

OL

V

IH

V

IL

I

IX

I

OZ

I

CC

Description

Output HIGH voltage

Output LOW voltage

Input HIGH voltage

Input LOW voltage

[3]

Input leakage current

Output leakage current

V

CC

operating supply current

GND < V

I

< V

CC

GND < V

I

< V

CC

, output disabled

V

CC

= Max,

I

OUT

= 0 mA,

f = f

max

= 1/t

RC

100 MHz

83 MHz

66 MHz

40 MHz

I

SB1

I

SB2

Automatic CE Power-down

current— TTL Inputs

Automatic CE Power-down

current— CMOS Inputs

Max V

CC

, CE > V

IH

,

V

IN

>V

IH

or V

IN

< V

IL

, f = f

max

Max V

CC

, CE > V

CC

– 0.3V,

V

IN

> V

CC

– 0.3V or V

IN

< 0.3V, f = 0

Test Conditions

I

OH

=

4.0

mA

I

OL

= 8.0 mA

2.4



2.2

0.5

1

–1



7C107D-10

7C1007D-10

Min

Max



0.4

V

CC

+ 0.5

0.8

+1

80

72

58

37

10

3

V

A

mA

Unit

Note

3. V

IL

(min) = –2.0 V and V

IH

(max) = V

CC

+ 1 V for pulse durations of less than 5 ns.

Document #: 38-05469 Rev. *H

Page 4 of 14

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CY7C107D

CY7C1007D

Capacitance

[4]

Parameter

C

IN

: Addresses

C

IN

: Controls

C

OUT

Output capacitance

Description

Input capacitance

Test Conditions

T

A

= 25 °C, f = 1 MHz, V

CC

= 5.0 V

Max

7

10

Unit

pF

Thermal Resistance

[4]

Parameter



JA



JC

Description

Thermal resistance

(junction to ambient)

Thermal resistance

(junction to case)

Test Conditions

Still Air, soldered on a 3 × 4.5 inch,

four-layer printed circuit board

300-Mil

Wide SOJ

59.16

40.84

400-Mil

Wide SOJ

58.76

40.54

Unit

C/W

AC Test Loads and Waveforms

[5]

Z = 50

OUTPUT

50



* CAPACITIVE LOAD CONSISTS

OF ALL COMPONENTS OF THE

TEST ENVIRONMENT

1.5V

3.0V

ALL INPUT PULSES

90%

10%

90%

10%

30 pF*

GND

Rise Time:

3

ns

(a)

High-Z characteristics:

5V

OUTPUT

INCLUDING

JIG AND

SCOPE

5 pF

(b)

Fall Time:

3

ns

R1 480

R2

255

(c)

Notes

4. Tested initially and after any design or process changes that may affect these parameters.

5. AC characteristics (except High-Z) are tested using the load conditions shown in Figure (a). High-Z characteristics are tested for all speeds using the test load

shown in Figure (c).

Document #: 38-05469 Rev. *H

Page 5 of 14

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