Data Sheet
January 1998
T7289A DS1 Line Interface
Features
s
s
Description
The Lucent Technologies Microelectronics Group
T7289A DS1 Line Interface is an integrated circuit
that provides a line interface between the DS1 cross
connect (DSX) and terminal equipment circuits for
cable distances of up to 655 ft. for 22-gauge, plastic,
insulated cable (PIC). The T7289A device performs
receive-pulse regeneration, timing recovery, and
transmit-pulse shaping and equalization functions.
The device is manufactured by using low-power
CMOS technology and is available in a 28-pin, plastic
DIP or in a 28-pin, plastic SOJ package. The T7289A
device is functionally compatible with the T7289,
LC1046A, and LC1046C devices for 1.544 Mbits/s
operation but provides improved jitter transfer and
crosstalk characteristics with a selectable single-rail/
dual-rail system interface.
Fully integrated DS1 line interface
Intended for use in systems that must comply
with PUB 43802, CB119, TR-TSY-000170, and TR-
TSY-000499 (Category I equipment)
Low power dissipation
On-chip transmit equalization
Monolithic clock recovery
High jitter accommodation
Excellent transmit template performance
Single-rail/dual-rail interface
Pin-selectable B8ZS encoder and decoder (during
single-rail mode only)
Loopback modes for fault isolation
Multiple link-status and alarm features
Minimal external circuitry required
s
s
s
s
s
s
s
s
s
s
T7289A DS1 Line Interface
Data Sheet
January 1998
Description
(continued)
LINE LENGTH
SELECT
INSERT
BLUE SIGNAL
TRANSMIT
LINE
OUTPUT
DRIVERS
SELECTABLE
PULSE
EQUALIZATION
B8ZS
ENCODER AND
RAIL
CONVERSION
TRANSMIT
DATA
LP1
LOOPBACKS
LP2
LP3
TRANSMIT
CLOCK
RECEIVE
LINE
RECEIVE
ANALOG
INPUT
CLOCK
EXTRACTION
& RETIMING
B8ZS
DECODER AND
BPV DETECTION
AND RAIL
CONVERSION
RECEIVED
DATA
LOSS OF
SIGNAL
RECEIVED
CLOCK
SINGLE-RAIL/DUAL-RAIL
SELECT
BIPOLAR
VIOLATION ALARM
5-4348(C)
Figure 1. T7289A Block Diagram
Pin Information
LOS
LOC
BZSC/TNDATA
BPV/RNDATA
RCLK
RDATA/RPDATA
TCLK
TDATA/TPDATA
LP1
LP2
LP3
ALMT
RBC
TBC
1
2
3
4
5
6
28
27
26
25
24
23
T1
R1
SD
GND
A
V
DDA
DUAL
T2
V
DDD
R2
GND
D
EC1
EC2
EC3
BCLK
5-4349(C)
7
T7289A-PL
22
8
T7289A-EL
21
9
10
11
12
13
14
20
19
18
17
16
15
Figure 2. Pin Diagram
2
Lucent Technologies Inc.
Data Sheet
January 1998
T7289A DS1 Line Interface
Pin Information
(continued)
Table 1. Pin Descriptions
This table refers to a cleared pin as low (0) and a set pin as high (1).
Pin
1
2
Symbol
LOS
LOC
Type*
O
u
O
u
3
BZSC/TNDATA
I
d
4
BPV/RNDATA
O
5
6
RCLK
RDATA
/RPDATA
O
O
7
8
TCLK
TDATA/TPDATA
I
I
9
LP1
I
u
10
LP2
I
u
11
LP3
I
u
12
13
ALMT
I
u
I
d
RBC
Name/Function
Loss of Signal (Active-Low).
This pin is cleared upon loss of the data
signal at the receiver inputs.
Loss of Clock (Active-Low).
This pin is cleared when SD = 1 and
LOS
= 0, indicating that a loss of clock has occurred. When
LOC
= 0, no
transitions occur on the RCLK and
RDATA
outputs. A valid clock must be
present at BCLK for this function to operate properly.
B8ZS Enable/Transmit Data Negative Rail.
If dual = 0, this pin is set to
insert a B8ZS substitution code on the transmit side and to remove the
substitution code on the receive side. If dual = 1, this pin is used as the
transmit data negative rail.
Bipolar Violation/Receive Data Negative Rail.
If dual = 0, this pin is set
upon detection of a bipolar violation on the receive-side input after the
removal of the B8ZS substitution code that contains legal violations. If
dual = 1, this pin is used as the receive data negative rail.
Receive Clock.
Output receive clock signal to the terminal equipment.
Receive Data (Active-Low)/Receive Data Positive Rail.
If dual = 0,
this pin is used as 1.544 Mbits/s inverted unipolar output data with a
100% duty cycle. If dual = 1, this pin is used as the transmit data positive
rail.
Transmit Clock.
DS1 input clock signal (1.544 MHz
±
130 ppm).
Transmit Data/Transmit Data Positive Rail.
If dual = 0, this pin is used
as 1.544 Mbits/s unipolar input data. If dual = 1, this pin is used as the
transmit data positive rail.
Loopback 1 Enable (Active-Low).
This pin is cleared for a full local
loopback (transmit converter output to receive converter input). Most of
the transmit and receive analog circuitry is exercised in this loopback.
Loopback 2 Enable (Active-Low).
This pin is cleared for a remote loop-
back (DSX to DSX). In loopback 2, a high on TBC (pin 14) inserts the
blue signal on the transmit side.
Loopback 3 Enable (Active-Low).
This pin is cleared for a digital local
loopback. Only the transmit and receive digital sections are exercised in
this loopback.
Alarm Test Enable (Active-Low).
This pin is cleared, forcing
LOS
= 0,
LOC
= 0, and BPV = 1 for testing without affecting data transmission.
Receive Blue Control.
This pin is set to insert the blue signal on the
receive side. During single-rail mode,
RDATA
is cleared. During dual-rail
mode, RPDATA and RNDATA toggle at half the blue clock rate. Blue
clock must be present.
* I = input, O = output, Iu = input with pull-up, Id = input with pull-down, Ou = output with pull-up.
† See Table 2.
Lucent Technologies Inc.
3
T7289A DS1 Line Interface
Data Sheet
January 1998
Pin Information
(continued)
Table 1. Pin Descriptions
(continued)
Pin
14
Symbol
TBC
Type
I
d
Name/Function
Transmit Blue Control (AIS).
This pin is set to insert the blue signal (all
1s) on the transmit side. This control has priority over a loopback 2 if
both are operated simultaneously.
Blue Clock.
DS1 blue clock signal (1.544 MHz
±
130 ppm). This clock is
independent of the transmit clock.
Equalizer Control 3
†
.
One of three control leads for selecting transmit
equalizers.
Equalizer Control 2
†
.
One of three control leads for selecting transmit
equalizers.
Equalizer Control 1
†
.
One of three control leads for selecting transmit
equalizers.
Digital Ground.
Transmit Bipolar Ring.
Negative bipolar transmit output.
5 V Digital Supply (
±
10%).
Transmit Bipolar Tip.
Positive bipolar transmit output.
Dual-Rail Mode Select.
This pin is cleared for single-rail mode and set
for dual-rail mode.
5 V Analog Supply (
±
10%).
Analog Ground (
±
10%).
Shutdown.
This pin is set forcing RCLK high,
RDATA
high, and
LOC
low
(for single-rail operation) if a loss of signal is detected (
LOS
= 0). For
dual-rail mode, RPDATA and RNDATA are forced low.
Receive Bipolar Ring.
Negative bipolar receive input.
Receive Bipolar Tip.
Positive bipolar receive input.
15
16
17
18
19
20
21
22
23
24
25
26
BCLK
EC3
EC2
EC1
GND
D
R2
V
DDD
T2
DUAL
V
DDA
GND
A
SD
I
I
d
I
d
I
d
—
O
—
O
I
d
—
—
I
d
27
28
R1
T1
I
I
* I = input, O = output, Iu = input with pull-up, Id = input with pull-down, Ou = output with pull-up.
† See Table 2.
Table 2. Equalizer Control
Other bit combinations represent test modes not to be used for normal operation.
Distance to DSX (Ft.)*
(Applies Only to
22-gauge PIC [ABAM]
Cable)
0—133
133—267
267—400
400—533
533—655
Maximum Cable Loss
(dB at 772 kHz)
EC1
EC2
EC3
0.6
1.2
1.8
2.4
3
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
* Use maximum loss figures for other cable types.
4
Lucent Technologies Inc.
Data Sheet
January 1998
T7289A DS1 Line Interface
Overview
The T7289A device is a fully integrated DS1 line interface that requires only two line-interface transformers and
three input termination resistors to provide a bidirectional line interface between a DS1 cross connect (DSX) and
terminal equipment. A typical application diagram is shown in Figure 3. This device is specified for use with
22-gauge, plastic-insulated ABAM cable, as well as other cable types. The circuit is divided into three main blocks:
transmit converter, receive converter, and logic. The transmit and receive converters process information signals
through the device in the transmit and receive directions, respectively; the logic is the control and status interface
for the device.
RECEIVED
DATA
T1
500
Ω
200
Ω
500
Ω
1:2
V
DDD
RECEIVE
INPUT
R1
+5 V
1 µF
GND
D
GND
A
T2
100
Ω
LOAD
TRANSMIT
OUTPUT
R2
1.14:1 (DS1)
5-4350(C)
RDATA/RPDATA
BPV/RNDATA
RCLK
TRANSMITTED
DATA
T7289A
DS1
LINE
INTERFACE
V
DDA
TDATA/TPDATA
BZSC/TNDATA
TCLK
Note: Lucent 2745 family pulse transformers for through-hole mounting or Lucent 2758 family pulse transformers for surface mounting are
recommended.
Figure 3. Typical Application Diagram for Bipolar Signal Interfacing
Lucent Technologies Inc.
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
