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HCTS574DMSR

产品描述HCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, SIDE BRAZED, CERAMIC, DIP-20
产品类别逻辑    逻辑   
文件大小422KB,共10页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
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HCTS574DMSR概述

HCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, SIDE BRAZED, CERAMIC, DIP-20

HCTS574DMSR规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称Renesas(瑞萨电子)
零件包装代码DIP
包装说明DIP, DIP20,.3
针数20
Reach Compliance Codenot_compliant
系列HCT
JESD-30 代码R-CDIP-T20
JESD-609代码e0
负载电容(CL)50 pF
逻辑集成电路类型BUS DRIVER
最大I(ol)0.006 A
位数8
功能数量1
端口数量2
端子数量20
最高工作温度125 °C
最低工作温度-55 °C
输出特性3-STATE
输出极性TRUE
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码DIP
封装等效代码DIP20,.3
封装形状RECTANGULAR
封装形式IN-LINE
峰值回流温度(摄氏度)NOT SPECIFIED
电源5 V
最大电源电流(ICC)0.75 mA
传播延迟(tpd)36 ns
认证状态Not Qualified
筛选级别MIL-PRF-38535 Class V
座面最大高度5.08 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术CMOS
温度等级MILITARY
端子面层Tin/Lead (Sn/Pb)
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
总剂量200k Rad(Si) V
触发器类型POSITIVE EDGE
宽度7.62 mm
Base Number Matches1

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DATASHEET
HCTS574MS
Radiation Hardened Octal D-Type Flip-Flop, Three-State, Positive Edge Triggered
FN2359
Rev.2.00
August 1995
Features
3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
- Bus Driver O11utputs - 15 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
Input Current Levels Ii
5A at VOL, VOH
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
OE
D0
D1
D2
D3
D4
D5
D6
D7
1
2
3
4
5
6
7
8
9
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CP
GND 10
Description
The Intersil HCTS574MS is a Radiation Hardened non-
inverting octal D-type, positive edge triggered flip-flop with
three-stateable outputs. The HCTS574MS utilizes advanced
CMOS/SOS technology. The eight flip-flops enter data into
their registers on the LOW-to-HIGH transition of the clock
(CP). Data is also transferred to the outputs during this tran-
sition. The output enable (OE) controls the three-state out-
puts and is independent of the register operation. When the
output enable is high, the outputs are in the high impedance
state.
The HCTS574MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS574MS is supplied in a 20 lead Ceramic
flatpack (K suffix) or a SBDIP Package (D suffix).
OE
D0
D1
D2
Q3
Q4
D5
D6
Q7
GND
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
Ordering Information
PART NUMBER
HCTS574DMSR
HCTS574KMSR
HCTS574D/Sample
HCTS574K/Sample
HCTS574HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
FN2359 Rev.2.00
August 1995
Page 1 of 10

 
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