simultaneous sampling 12-bit A/D converters designed for
digitizing high frequency, wide dynamic range signals. They
are perfect for demanding communications applications
with AC performance that includes 71dB SNR and 90dB
spurious free dynamic range (SFDR). An ultralow jitter of
0.15ps
RMS
allows undersampling of IF frequencies with
excellent noise performance.
DC specifications include ±0.3LSB INL (typ), ±0.1LSB
DNL (typ) and no missing codes over temperature. The
transition noise is a low 0.3LSB
RMS
.
The digital outputs are serial LVDS to minimize the num-
ber of data lines. Each channel outputs two bits at a time
(2-lane mode) or one bit at a time (1-lane mode). The LVDS
drivers have optional internal termination and adjustable
output levels to ensure clean signal integrity.
The ENC
+
and ENC
–
inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An internal clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
4-Channel Simultaneous Sampling ADC
71dB SNR
90dB SFDR
Low Power: 306mW/198mW/160mW Total,
77mW/50mW/40mW per Channel
Single 1.8V Supply
Serial LVDS Outputs: One or Two Bits per Channel
Selectable Input Ranges: 1V
P-P
to 2V
P-P
800MHz Full Power Bandwidth Sample-and-Hold
Shutdown and Nap Modes
Serial SPI Port for Configuration
Pin-Compatible 14-Bit and 12-Bit Versions
52-Pin (7mm
×
8mm) QFN Package
APPLICATIONS
n
n
n
n
n
n
Communications
Cellular Base Stations
Software Defined Radios
Portable Medical Imaging
Multichannel Data Acquisition
Nondestructive Testing
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
1.8V
V
DD
CHANNEL 1
ANALOG
INPUT
CHANNEL 2
ANALOG
INPUT
CHANNEL 3
ANALOG
INPUT
CHANNEL 4
ANALOG
INPUT
ENCODE
INPUT
S/H
12-BIT
ADC CORE
1.8V
OV
DD
OUT1A
OUT1B
OUT2A
AMPLITUDE (dBFS)
DATA
SERIALIZER
S/H
12-BIT
ADC CORE
OUT2B
OUT3A
OUT3B
OUT4A
OUT4B
DATA
CLOCK
OUT
FRAME
SERIALIZED
LVDS
OUTPUTS
LTC2172-12, 65Msps,
2-Tone FFT, f
IN
= 70MHz and 75MHz
0
–10
–20
–30
–40
–50
–60
–70
–80
S/H
12-BIT
ADC CORE
S/H
12-BIT
ADC CORE
–90
–100
–110
–120
0
20
10
FREQUENCY (MHz)
30
217212 TA01b
PLL
GND
OGND
217212 TA01
21721012f
1
LTC2172-12/
LTC2171-12/LTC2170-12
ABSOLUTE MAXIMUM RATINGS
(Notes 1 and 2)
PIN CONFIGURATION
TOP VIEW
PAR/SER
OUT1A
+
OUT1A
–
OUT1B
+
OUT4A
–
OUT1B
–
40 OUT2A
+
39 OUT2A
–
38 OUT2B
+
37 OUT2B
–
36 DCO
+
35 DCO
–
53
GND
34 OV
DD
33 OGND
32 FR
+
31 FR
–
30 OUT3A
+
29 OUT3A
–
28 OUT3B
+
27 OUT3B
–
15 16 17 18 19 20 21 22 23 24 25 26
V
DD
V
DD
CS
ENC
+
ENC
–
SCK
SDI
GND
–
Supply Voltages
V
DD
, OV
DD
............................................... –0.3V to 2V
Analog Input Voltage (A
IN +
, A
IN –
,
PAR/SER, SENSE) (Note 3) ...........–0.3V to (V
DD
+ 0.2V)
Digital Input Voltage (ENC
+
, ENC
–
,
CS,
SDI, SCK) (Note 4) .................................... –0.3V to 3.9V
SDO (Note 4) ............................................ –0.3V to 3.9V
Digital Output Voltage ................ –0.3V to (OV
DD
+ 0.3V)
Operating Temperature Range
LTC2172C, LTC2171C, LTC2170C............. 0°C to 70°C
LTC2172I, LTC2171I, LTC2170I ............ –40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
SENSE
V
REF
GND
52 51 50 49 48 47 46 45 44 43 42 41
A
IN1+
1
A
IN1–
2
V
CM12
3
A
IN2+
4
A
IN2–
5
REFH 6
REFH 7
REFL 8
REFL 9
A
IN3+
10
A
IN3–
11
V
CM34
12
A
IN4+
13
A
IN4–
14
OUT4B
+
OUT4A
+
GND
SDO
V
DD
V
DD
UKG PACKAGE
52-LEAD (7mm
×
8mm) PLASTIC QFN
T
JMAX
= 150°C,
θ
JA
= 28°C/W
EXPOSED PAD (PIN 53) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC2172CUKG-12#PBF
LTC2172IUKG-12#PBF
LTC2171CUKG-12#PBF
LTC2171IUKG-12#PBF
LTC2170CUKG-12#PBF
LTC2170IUKG-12#PBF
TAPE AND REEL
LTC2172CUKG-12#TRPBF
LTC2172IUKG-12#TRPBF
LTC2171CUKG-12#TRPBF
LTC2171IUKG-12#TRPBF
LTC2170CUKG-12#TRPBF
LTC2170IUKG-12#TRPBF
PART MARKING*
LTC2172UKG-12
LTC2172UKG-12
LTC2171UKG-12
LTC2171UKG-12
LTC2170UKG-12
LTC2170UKG-12
PACKAGE DESCRIPTION
52-Lead (7mm × 8mm) Plastic QFN
52-Lead (7mm × 8mm) Plastic QFN
52-Lead (7mm × 8mm) Plastic QFN
52-Lead (7mm × 8mm) Plastic QFN
52-Lead (7mm × 8mm) Plastic QFN
52-Lead (7mm × 8mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
OUT4B
21721012f
2
LTC2172-12/
LTC2171-12/LTC2170-12
CONVERTER CHARACTERISTICS
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
LTC2172-12
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Gain Matching
Offset Matching
Transition Noise
External Reference
Internal Reference
External Reference
External Reference
Differential Analog Input
(Note 7)
Internal Reference
External Reference
CONDITIONS
l
LTC2171-12
MIN
12
–1
–0.4
–12
–2.5
TYP
±0.3
±0.1
±3
–1
–1
±20
±35
±25
±0.2
±3
0.32
MAX
1
0.4
12
0.5
12
–1
LTC2170-12
MIN
TYP
±0.3
±0.1
±3
–1
–1
±20
±35
±25
±0.2
±3
0.32
MAX
1
0.4
12
0.5
UNITS
Bits
LSB
LSB
mV
%FS
%FS
μV/°C
ppm/°C
ppm/°C
%FS
mV
LSB
RMS
MIN
12
–1
–0.5
–12
–2.5
TYP
±0.3
±0.1
±3
–1
–1
±20
±35
±25
±0.2
±3
0.32
MAX
1
0.5
12
0.5
Differential Analog Input (Note 6)
l
l
l
l
–0.4
–12
–2.5
ANALOG INPUT
SYMBOL PARAMETER
V
IN
V
IN(CM)
V
SENSE
I
IN(CM)
The
l
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
1.7V < V
DD
< 1.9V
Differential Analog Input (Note 8)
External Reference Mode
Per Pin, 65Msps
Per Pin, 40Msps
Per Pin, 25Msps
0 < A
IN +
, A
IN –
< V
DD
0 < PAR/SER < V
DD
0.625 < SENSE < 1.3V
l
l
l
l
l
V
CM
– 100mV
l
MIN
TYP
1 to 2
V
CM
1.250
81
50
31
MAX
V
CM
+ 100mV
1.300
UNITS
V
P-P
V
V
μA
μA
μA
Analog Input Range (A
IN +
– A
IN –
)
Analog Input Common Mode (A
IN +
+ A
IN –
)/2
External Voltage Reference Applied to SENSE
Analog Input Common Mode Current
0.625
I
IN1
I
IN2
I
IN3
t
AP
t
JITTER
CMRR
BW-3B
Analog Input Leakage Current (No Encode)
PAR/SER Input Leakage Current
SENSE Input Leakage Current
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Jitter
Analog Input Common Mode Rejection Ratio
Full-Power Bandwidth
–1
–3
–6
0
0.15
80
1
3
6
μA
μA
μA
ns
ps
RMS
dB
MHz
Figure 6 Test Circuit
800
21721012f
3
LTC2172-12/
LTC2171-12/LTC2170-12
DYNAMIC ACCURACY
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 5)
LTC2172-12
CONDITIONS
5MHz Input
30MHz Input
70MHz Input
140MHz Input
l
LTC2171-12
MIN
69.5
TYP
70.9
70.8
70.8
70.5
90
90
89
84
90
90
90
90
70.8
70.7
70.6
70.2
–90
–105
MAX
LTC2170-12
MIN
69.3
TYP
70.5
70.5
70.5
70.2
90
90
89
84
90
90
90
90
70.5
70.4
70.3
69.9
–90
–105
MAX
UNITS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBc
dBc
MIN
69.7
TYP
71
71
70.9
70.6
90
90
89
84
90
90
90
90
70.9
70.9
70.7
70.3
–90
–105
MAX
SFDR
Spurious Free Dynamic Range 5MHz Input
2nd or 3rd Harmonic
30MHz Input
70MHz Input
140MHz Input
Spurious Free Dynamic Range 5MHz Input
4th Harmonic or Higher
30MHz Input
70MHz Input
140MHz Input
l
77
79
79
l
85
85
85
S/(N+D)
Signal-to-Noise Plus
Distortion Ratio
5MHz Input
30MHz Input
70MHz Input
140MHz Input
10MHz Input (Note 12)
10MHz Input (Note 12)
l
69.1
69.4
69.2
Crosstalk, Near Channel
Crosstalk, Far Channel
INTERNAL REFERENCE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Temperature Drift
V
CM
Output Resistance
V
REF
Output Voltage
V
REF
Output Temperature Drift
V
REF
Output Resistance
V
REF
Line Regulation
–400μA < I
OUT
< 1mA
1.7V < V
DD
< 1.9V
–600μA < I
OUT
< 1mA
I
OUT
= 0
CONDITIONS
I
OUT
= 0
The
l
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 5)
MIN
0.5 • V
DD
– 25mV
TYP
0.5 • V
DD
±25
4
1.225
1.250
±25
7
0.6
1.275
MAX
0.5 • V
DD
+ 25mV
UNITS
V
ppm/°C
Ω
V
ppm/°C
Ω
mV/V
21721012f
4
LTC2172-12/
LTC2171-12/LTC2170-12
DIGITAL INPUTS AND OUTPUTS
SYMBOL PARAMETER
ENCODE INPUTS (ENC
+
, ENC
–
)
Differential Encode Mode (ENC
–
Not Tied to GND)
V
ID
V
ICM
V
IN
R
IN
C
IN
V
IH
V
IL
V
IN
R
IN
C
IN
V
IH
V
IL
I
IN
C
IN
R
OL
I
OH
C
OUT
V
OD
V
OS
R
TERM
Differential Input Voltage
Common Mode Input Voltage
Input Voltage Range
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
Input Voltage Range
Input Resistance
Input Capacitance
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
Logic Low Output Resistance to GND
Logic High Output Leakage Current
Output Capacitance
Differential Output Voltage
Common Mode Output Voltage
On-Chip Termination Resistance
100Ω Differential Load, 3.5mA Mode
100Ω Differential Load, 1.75mA Mode
100Ω Differential Load, 3.5mA Mode
100Ω Differential Load, 1.75mA Mode
Termination Enabled, OV
DD
= 1.8V
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
MIN
TYP
MAX
UNITS
(Note 8)
Internally Set
Externally Set (Note 8)
ENC
+
, ENC
–
to GND
(See Figure 10)
l
l
l
0.2
1.2
1.1
0.2
10
3.5
1.6
3.6
V
V
V
V
kΩ
pF
V
0.6
V
V
kΩ
pF
V
0.6
V
μA
pF
Ω
10
3
μA
pF
454
250
1.375
1.375
mV
mV
V
V
Ω
10
3
3.6
30
3.5
Single-Ended Encode Mode (ENC
–
Tied to GND)
V
DD
= 1.8V
V
DD
= 1.8V
ENC
+
to GND
(See Figure 11)
l
l
l
1.2
0
DIGITAL INPUTS (CS, SDI, SCK in Serial or Parallel Programming Mode. SDO in Parallel Programming Mode)
V
DD
= 1.8V
V
DD
= 1.8V
V
IN
= 0V to 3.6V
l
l
l
1.3
–10
SDO OUTPUT (Serial Programming Mode. Open-Drain Output. Requires 2k Pull-Up Resistor if SDO Is Used)
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
