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HD74HC670RP-EL: 产品描述4X4 STANDARD SRAM, 200ns, PDSO16, FP-16DN; 产品类别存储存储; 文件大小55KB，共10页; 制造商Renesas(瑞萨电子); 官网地址https://www.renesas.com/

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HD74HC670RP-EL概述

4X4 STANDARD SRAM, 200ns, PDSO16, FP-16DN

HD74HC670RP-EL规格参数

参数名称	属性值
厂商名称	Renesas(瑞萨电子)
零件包装代码	SOIC
包装说明	SOP,
针数	16
Reach Compliance Code	compliant
ECCN代码	EAR99
最长访问时间	200 ns
JESD-30 代码	R-PDSO-G16
长度	9.9 mm
内存密度	16 bit
内存集成电路类型	STANDARD SRAM
内存宽度	4
功能数量	1
端子数量	16
字数	4 words
字数代码	4
工作模式	ASYNCHRONOUS
最高工作温度	85 °C
最低工作温度	-40 °C
组织	4X4
封装主体材料	PLASTIC/EPOXY
封装代码	SOP
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE
并行/串行	PARALLEL
认证状态	Not Qualified
座面最大高度	1.75 mm
最大供电电压 (Vsup)	6 V
最小供电电压 (Vsup)	2 V
标称供电电压 (Vsup)	4.5 V
表面贴装	YES
技术	CMOS
温度等级	INDUSTRIAL
端子形式	GULL WING
端子节距	1.27 mm
端子位置	DUAL
宽度	3.9 mm
Base Number Matches	1

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HD74HC670

4-by-4 Register File (with 3-state outputs)

Description

The HD74HC670, 16-bit register file is organized as 4 words of 4 bits each and separate on-chip decoding

is provided for addressing the four word locations to either write-in or retrieve data.

This permits simultaneous writing into one location and reading from another word location. Four data

inputs are available which are used to supply the 4-bit word to be stored. Location of the word is

determined by the write-address inputs A and B in conjunction with a write-enable signal. Data applied at

the inputs should be in its true form. That is, if a high-level signal is desired from the output, a high-level is

applied at the data input for that particular bit location. The latch inputs are arranged so that new data will

be accepted only if both internal address gate inputs are high. When this condition exists, data at the D

input is transferred to the latch output. When the write-enable input, (G

) is high, the data inputs are

inhibited and their levels can cuase no change in the information stored in the internal latches. When the

read-enable input, (G

) is high, the data outputs are inhibited and go into the high-impedance state. The

individual address lines permit direct acquisition of data stored in any four of the latches. Four individual

decoding gates are used to complete the address for reading a word. when the read address is made in

conjunction with the read-enable signal, the word appears at the four outputs.

Features

•

High Speed Operation: t

(Read Select to Q) = 21 ns typ (C

= 50 pF)

High Output Current: Fanout of 15 LSTTL Loads

Wide Operating Voltage: V

= 2 to 6 V

Low Input Current: 1 µA max

Low Quiescent Supply Current: I

(static) = 4 µA max (Ta = 25°C)

HD74HC670RP-EL相似产品对比

	HD74HC670RP-EL	HD74HC670FP-EL
描述	4X4 STANDARD SRAM, 200ns, PDSO16, FP-16DN	4X4 STANDARD SRAM, 200ns, PDSO16, FP-16DA
厂商名称	Renesas(瑞萨电子)	Renesas(瑞萨电子)
零件包装代码	SOIC	SOIC
包装说明	SOP,	FP-16DA
针数	16	16
Reach Compliance Code	compliant	unknown
最长访问时间	200 ns	200 ns
JESD-30 代码	R-PDSO-G16	R-PDSO-G16
长度	9.9 mm	10.06 mm
内存密度	16 bit	16 bit
内存集成电路类型	STANDARD SRAM	STANDARD SRAM
内存宽度	4	4
功能数量	1	1
端子数量	16	16
字数	4 words	4 words
字数代码	4	4
工作模式	ASYNCHRONOUS	ASYNCHRONOUS
最高工作温度	85 °C	85 °C
最低工作温度	-40 °C	-40 °C
组织	4X4	4X4
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	SOP	SOP
封装形状	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE	SMALL OUTLINE
并行/串行	PARALLEL	PARALLEL
认证状态	Not Qualified	Not Qualified
座面最大高度	1.75 mm	2.2 mm
最大供电电压 (Vsup)	6 V	6 V
最小供电电压 (Vsup)	2 V	2 V
标称供电电压 (Vsup)	4.5 V	4.5 V
表面贴装	YES	YES
技术	CMOS	CMOS
温度等级	INDUSTRIAL	INDUSTRIAL
端子形式	GULL WING	GULL WING
端子节距	1.27 mm	1.27 mm
端子位置	DUAL	DUAL
宽度	3.9 mm	5.5 mm
Base Number Matches	1	1

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