time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are
advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the
product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not
authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. – www.issi.com
Rev. 00A, 07/10/2012
3
IS31AP2117
PIN DESCRIPTION
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15, 16
17
18, 19
20~23
24, 25
26
27, 28
Pin
SDB
FSEL
INL+
INL-
GAIN0
GAIN1
AVCC
AGND
BYPASS
AVDD
AGCLMT
INR-
INR+
MUTE
PVCC
BSR
OUTR
PGND
OUTL
BSL
PVCC
Thermal Pad
Description
Shutdown control. Active low.
Frequency select input pin. (low = 300kHz, high = 400kHz)
Positive audio input for left channel.
Negative audio input for left channel.
Gain select least significant bit.
Gain select most significant bit.
Analog power supply.
Analog signal ground.
Reference for pre-amplifier inputs. Nominally equal to
AVDD/2.
5V regulated output. Connect 2.2μF to AGND.
Power limit level adjusting pin. Connect a resistor divider
from AVDD to AGND to set power limit. Connect directly to
AVDD for no power limit.
Negative audio input for right channel.
Positive audio input for right channel.
Mute mode control.
Power supply for right channel H-bridge. PVCCR and
PVCCL must be connected together on the PCB.
Bootstrap I/O for right channel, high-side FET.
Class-D H-bridge output for right channel.
Power ground for the H-bridges.
Class-D H-bridge output for left channel.
Bootstrap I/O for left channel, high-side FET.
Power supply for left channel H-bridge. PVCCR and PVCCL
must be connected together on the PCB.
Connect to GND.
Integrated Silicon Solution, Inc. – www.issi.com
Rev. 00A, 07/10/2012
4
IS31AP2117
ABSOLUTE MAXIMUM RATINGS
Supply voltage (AVCC, PVCC), V
CC
Voltage at SDB, GAIN0, GAIN1, FSEL, MUTE pins
Voltage at IN, AGCLMT pins
Voltage at OUTR, OUTL
Voltage at AVDD
Maximum junction temperature, T
JMAX
Storage temperature range, T
STG
Operating temperature range, T
A
-0.3V
~ +30.0V
-0.3V
~ V
CC
+0.3V
-0.3 to V
AVDD
+0.3V
-0.3 to V
CC
+0.3V
-0.3V
~ +6.0V
150°C
-65°C
~ +150°C
−40°C
~ +85°C
Note:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
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