CEP70N06/CEB70N06
N-Channel Enhancement Mode Field Effect Transistor
FEATURES
60V, 70A, R
DS(ON)
= 13mΩ @V
GS
= 10V.
Super high dense cell design for extremely low R
DS(ON)
.
High power and current handing capability.
Lead free product is acquired.
TO-220 & TO-263 package.
D
D
G
S
CEB SERIES
TO-263(DD-PAK)
G
G
D
S
CEP SERIES
TO-220
S
ABSOLUTE MAXIMUM RATINGS
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
Drain Current-Pulsed
a
Tc = 25 C unless otherwise noted
Symbol
Limit
V
DS
V
GS
I
D
I
DM
P
D
E
AS
I
AS
T
J
,T
stg
60
Units
V
V
A
A
W
W/ C
mJ
A
C
±
20
70
280
150
1.0
480
50
-55 to 175
Maximum Power Dissipation @ T
C
= 25 C
- Derate above 25 C
Single Pulsed Avalanche Energy
d
Single Pulsed Avalanche Current
d
Operating and Store Temperature Range
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
Symbol
R
θJC
R
θJA
Limit
1.0
62.5
Units
C/W
C/W
2004.December
4 - 142
http://www.cetsemi.com
CEP70N06/CEB70N06
Electrical Characteristics
Parameter
Off Characteristics
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics
Static Drain-Source
On-Resistance
Forwand Transconductance
Dynamic Characteristics
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-On Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
b
c
c
b
Tc = 25 C unless otherwise noted
Symbol
BV
DSS
I
DSS
I
GSSF
I
GSSR
V
GS(th)
R
DS(on)
g
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
I
S
V
SD
V
GS
= 0V, I
S
= 50A
V
DS
= 48V, I
D
= 50A,
V
GS
= 10V
V
DD
= 30V, I
D
= 50A,
V
GS
= 10V, R
GEN
= 3.6Ω
Test Condition
V
GS
= 0V, I
D
= 250µA
V
DS
= 58V, V
GS
= 0V
V
GS
= 20V, V
DS
= 0V
V
GS
= -20V, V
DS
= 0V
V
GS
= V
DS
, I
D
= 250µA
V
GS
= 10V, I
D
= 50A
V
DS
= 25V, I
D
= 50A
2
10
20.7
2384
567
69
19.3
9.7
41.8
8.4
50.7
10.7
19.1
50
1.3
38
19
63
17
66
Min
60
25
100
-100
4
13
Typ
Max
Units
V
µA
4
nA
nA
V
mΩ
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
A
V
Gate Threshold Voltage
V
DS
= 25V, V
GS
= 0V,
f = 1.0 MHz
Drain-Source Diode Characteristics and Maximun Ratings
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
c.Guaranteed by design, not subject to production testing.
d.L = 260µH, I
AS
= 50A, V
DD
= 24V, R
G
= 25Ω, Starting T
J
= 25 C
4 - 143
CEP70N06/CEB70N06
100
V
GS
=10,9,8,7V
120
100
80
60
40
25 C
20
T
J
=125 C
0
0
1
2
3
4
1
2
3
4
5
6
7
-55 C
I
D
, Drain Current (A)
V
GS
=6V
60
40
V
GS
=5V
20
V
GS
=4V
0
I
D
, Drain Current (A)
80
V
DS
, Drain-to-Source Voltage (V)
Figure 1. Output Characteristics
3600
3000
2400
1800
1200
600
0
0
5
10
15
20
25
Coss
Crss
Ciss
2.6
2.2
1.8
1.4
1.0
0.6
0.2
-100
V
GS
, Gate-to-Source Voltage (V)
Figure 2. Transfer Characteristics
R
DS(ON),
Normalized
R
DS(ON)
, On-Resistance(Ohms)
I
D
=50A
V
GS
=10V
C, Capacitance (pF)
-50
0
50
100
150
200
V
DS
, Drain-to-Source Voltage (V)
Figure 3. Capacitance
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
-50
T
J
, Junction Temperature( C)
Figure 4. On-Resistance Variation
with Temperature
V
GS
=0V
2
V
TH
, Normalized
Gate-Source Threshold Voltage
V
DS
=V
GS
I
D
=250µA
I
S
, Source-drain current (A)
25
50
75
100
125
150
10
10
1
10
-25
0
0
0.2
0.6
1.0
1.4
1.8
2.2
T
J
, Junction Temperature( C)
Figure 5. Gate Threshold Variation
with Temperature
V
SD
, Body Diode Forward Voltage (V)
Figure 6. Body Diode Forward Voltage
Variation with Source Current
4 - 144
CEP70N06/CEB70N06
V
GS
, Gate to Source Voltage (V)
10
V
DS
=48V
I
D
=50A
10
3
I
D
, Drain Current (A)
8
4
R
DS(ON)
Limit
10
2
100µs
1ms
10ms
DC
6
4
10
1
2
0
0
10
20
30
40
50
60
10
0
T
C
=25 C
T
J
=175 C
Single Pulse
10
-1
10
0
10
1
10
2
Qg, Total Gate Charge (nC)
Figure 7. Gate Charge
V
DS
, Drain-Source Voltage (V)
Figure 8. Maximum Safe
Operating Area
V
DD
t
on
V
IN
D
V
GS
R
GEN
G
90%
t
off
t
r
90%
R
L
V
OUT
t
d(on)
V
OUT
t
d(off)
90%
10%
t
f
10%
INVERTED
S
V
IN
50%
10%
50%
PULSE WIDTH
Figure 9. Switching Test Circuit
Figure 10. Switching Waveforms
r(t),Normalized Effective
Transient Thermal Impedance
10
0
D=0.5
0.2
10
-1
0.1
0.05
0.02
0.01
Single Pulse
P
DM
t
1
t
2
1. R
θJA
(t)=r (t) * R
θJA
2. R
θJA
=See Datasheet
3. T
JM-
T
A
= P* R
θJA
(t)
4. Duty Cycle, D=t1/t2
10
-2
10
-2
10
-1
10
0
10
1
10
2
10
3
10
4
Square Wave Pulse Duration (msec)
Figure 11. Normalized Thermal Transient Impedance Curve
4 - 145
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