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HD74HC279T

产品描述R-S Latch, HC/UH Series, 4-Func, Low Level Triggered, 2-Bit, True Output, CMOS, PDSO16, TTP-16DA
产品类别逻辑    逻辑   
文件大小54KB,共7页
制造商Hitachi (Renesas )
官网地址http://www.renesas.com/eng/
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HD74HC279T概述

R-S Latch, HC/UH Series, 4-Func, Low Level Triggered, 2-Bit, True Output, CMOS, PDSO16, TTP-16DA

HD74HC279T规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称Hitachi (Renesas )
零件包装代码SOIC
包装说明TSSOP, TSSOP16,.25
针数16
Reach Compliance Codeunknown
其他特性WITH DUAL S INPUT FOR TWO FUNCTIONS
系列HC/UH
JESD-30 代码R-PDSO-G16
JESD-609代码e0
长度5 mm
负载电容(CL)50 pF
逻辑集成电路类型R-S LATCH
最大I(ol)0.004 A
位数2
功能数量4
端子数量16
最高工作温度85 °C
最低工作温度-40 °C
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装等效代码TSSOP16,.25
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源2/6 V
Prop。Delay @ Nom-Sup33 ns
传播延迟(tpd)165 ns
认证状态Not Qualified
座面最大高度1.1 mm
最大供电电压 (Vsup)6 V
最小供电电压 (Vsup)2 V
标称供电电压 (Vsup)4.5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Tin/Lead (Sn/Pb)
端子形式GULL WING
端子节距0.65 mm
端子位置DUAL
触发器类型LOW LEVEL
宽度4.4 mm
Base Number Matches1

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HD74HC279
Quad.
S–R
Latches
ADE-205-483 (Z)
1st. Edition
Sep. 2000
Description
The latch is ideally suited for use as temporary stage for binary information processing and input/output
units. When either
S
or
R
is low, output is dependent on
R
input. When both inputs are high, Output is
stored before the indicated steady-state input conditions were established. And when both inputs are low,
output is high, but this high level are uncontinuance, if either of input goes high.
Features
High Speed Operation: t
pd
(S to Q) = 10 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: I
CC
(static) = 2 µA max (Ta = 25°C)
Function Table
Input
S*
2
H
L
H
L
H :
L :
Q
0
:
Notes:
R
H
H
L
L
Output
Q
Q
0
H
L
H*
1
High level
Low level
The level of Q respectively, before the indicated steady-state input conditions were established.
1. It is unpredictable, if
S
or
R
goes High.
2. As to latches which has two
S
inputs.
H: Both of
S
inputs are high.
L: Either or both of
S
inputs are low.

 
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