TXC100
Complies with Directive 2002/95/EC (RoHS)
TXC100 Product Overview
TXC100 is a rugged single-chip ASK/FSK transmitter IC designed
for operation in the 300-450 MHz frequency range. The highly
integrated TXC100 includes a complete PLL frequency
synthesizer plus an RF power amplifier that require very few
external components. The TXC100 is very small in size and
features high output power and low current consumption making it
ideal for a wide range of short-range wireless applications in the
industrial, automotive and consumer markets.
300-450 MHz
Transmitter
Key Features
•
•
•
•
Operating Frequency Range: 300-450 MHz
Modulation Types: ASK/FSK
Operation supply voltage: 2.1 - 3.6V
High Date rate:
OOK/ASK: 100 kbps
FSK: 20 kbps
Low current consumption:
OOK/ASK mode: 7 mA typical
FSK mode: 10 mA typical
Low Stand by current: < 1 nA
Adjustable Output power: -10 to +10 dBm
Adjustable FSK Shift
Programmable Clock Output
Very Low external component count
Extended temperature range: -40 to +125 °C.
Small Package: 3x3 mm 16-pin TQFN package
Standard 13 inch reel, 2500 pieces
3x3 mm package
•
•
•
•
•
•
•
•
•
Electrical Characteristics
Characteristics
Operating Frequency
Modulation Types
ASK Data Rate
FSK Data Rate
Peak RF Output Power
Standby Current
Supply Voltage Range
V
DD
Ta
2.1
-40
Operating Temperature
+10
1
3.6
+125
Sym
fo
Min
300
OOK/ASK/
FSK
100
20
kbps
kbps
dBm
nA
Vdc
o
Typical
Max
450
Units
MHz
Typical Applications
•
•
•
•
•
•
•
•
•
•
•
•
Active RFID tags
Automated Meter reading
Wireless sensor nodes
Home Automation
Security systems
Tire pressure monitoring
Remote keyless entry
Automobile Immobilizers
Sports & Performance monitoring
Wireless Toys
Medical equipment
Command & Control systems
C
Reference Crystal Parameters
Characteristics
Crystal Frequency
Load Capacitance
Motional Capacitance
Tolerance
Sym
fc
Cl
Cm
Tol
9
±30
Min
Typical
fo/32
3
10
Max
Units
MHz
pF
fF
ppm
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Page 1 of 11
TXC100 - 08/18/10
TXC100 Block Diagram and Typical Application Circuit
D0 D1 D2
11 12
13
Mode TX Data
Input
Input
VDD PA
2
3
6
RF
Control
C
5
C
6
C
7
Modulation
Control
C
4
C
1
Y1
Mode Select
(ASK / FSK)
Shape
7
R
1
XTAL1 14
REF
EXT
/XTAL2
XTAL
DRV
LOGIC
C
8
Mixer
Filter
OSC
PA
8
C
10
L
1
PA
Output
C
9
C
2
15
C
3
CLK0
CLK1
L
2
C
11
C
12
9
10
/N
/32
5
CLK
BIAS
1
C
13
V
CC
C
14
C
15
C
16
PIN 4 ENABLE INPUT
PIN 16 GND
Component Values for Typical Application Circuit
Comp
C1
C2
C3
3
C4
3
C5
C6
C7
C8
C9
C10¹
C11¹
C12¹
C13
C14
C15
C16¹
L1¹²
L2¹²
Y1
315 MHz Band
100 pF
100 pF
DNP
DNP
1.0 uF
0.01uF
220 pF
100 pF
680 pF
15 pF
22 pF
15 pF
1.0 uF
0.01uF
220 pF
DNP
27nH
22 nH
9.84375 MHz*
433 MHz Band
100 pF
100 pF
DNP
DNP
1.0 uF
0.01 uF
220 pF
100 pF
680 pF
3.3 pF
5.6 pF
12 pF
1.0 uF
0.01uF
220 pF
DNP
22 nH
18 nH
13.5600 MHz**
¹Matched to 50 ohms
²Use wirewound inductors
only
3
Use for External Reference Input
DNP - Do Not Populate
*Hong Kong Crystal P/N SSL9843750E03FAFR800
**Hong Kong Crystal P/N SSM1356000E03FAFR800
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Page 2 of 11
TXC100 - 08/18/10
Pin Configuration
BOTTOM VIEW
Xtal2/REF
IN
3x3mm
Dev2
Xtal1
13
Dev1
Dev0
Clk1
Clk0
12
11
10
9
8
PA
Out
14
15
16
1
2
3
4
V
DD
Mode
Sel
Data
IN
Stdby
7
ES
Out
6
V
DDPA
Pin Description
Pin
1
Name
V
DD
Description
V
DD
is the supply voltage for the PLL and logic circuitry. Bypass this pin as close as possible with parallel 1.0 µF, 0.01 µF, 220 pF
capacitors.
The Mode Select Pin allows the TXC100 to be set in either OOK/ASK or FSK mode:
Logic Low: OOK/ASK mode
Logic High: FSK mode
2
Mode
Sel
In OOK/ASK mode, data input to the Data
IN
Pin (3) gates the internal power amplifier. A logic high turns the power amplifier on. A logic
low turns off the power amplifier.
In FSK mode, data input to the Data
IN
Pin shifts the carrier frequency by the amount programmed through the DEV[2..0] pins (11,12,13).
A logic low performs no shift. The frequency of a logic low input in FSK mode is the same frequency as a logic high in OOK/ASK mode.
The FSK deviation is achieved by pulling the crystal frequency. See
Crystal Reference
section (pin 15) for more details. The maximum
FSK deviation for the 315 MHz band and 433 MHz band is approximately 55 kHz and 80 kHz, respectively.
The Data Input Pin turns the Power Amplifier on/off in OOK/ASK mode, or high/low frequency in FSK mode:
Low (OOK/ASK mode): Power Amplifier off
High (OOK/ASK mode): Power Amplifier on
Low (FSK mode): Low frequency
High (FSK mode): High frequency
The Standby Input Pin selects active or low power shutdown/standby mode:
If this pin unconnected or logic low, the TXC100 is placed in low current standby mode.
If this pin is logic high, the TXC100 is in active mode and ready to transmit
4
Stdby
Note: Lowest current consumption is achieved when all configuration pins are logic low.
When this pin sets the device in low power shutdown, the device draws nominally 0.2 nA. When the device is brought out of standby with
a logic high input, it is ready for operation within 200 µs. This pin has an internal pull-down resistor so it can be pulled low or left
unconnected.The 200 µs turn-on time is due to crystal start-up. An optimally matched crystal will minimize this turn-on time. See the
Crystal Reference
section (Pin 15) for details on crystal load matching.
3
Data
IN
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Clk
Out
GND
5
Page 3 of 11
TXC100 - 08/18/10
The clock output is a scaled and buffered version of the crystal frequency, which may be used to drive external logic or a microprocessor.
The frequency is programmable through Pins 9 (Clk0) and 10(Clk1) as below:
Clk0
0
1
0
1
fc = Crystal Frequency
6
V
DDPA
This pin is a power supply voltage source for the transmitter power amplifier. Bypass this pin as close as possible with a 0.01 µF and 220
pF capacitor. ES
Out
is the alternate power amplifier voltage source as discussed below.
This pin can be used to supply voltage to the power amplifier instead of V
DDPA
, allowing the on/off rise and fall times of the power amplifier
to be adjusted in ASK mode. Reducing the rise and fall times reduces the spectral bandwidth of the modulated output signal, and also
reduces average transmitter power. Rise and fall times are adjusted by placing a resistor in the range of 1K to 5K in series with this
output, as close as possible to the TXC100 IC to minimize circuit parasitics. The power amplifier side of the resistor should be bypassed
with 680 pF and 220 pF capacitors in parallel, as close to the resistor as possible.
Power Amplifier - the power amplifier is an open-drain, Class C amplifier designed for a load impedance at PA
OUT
(pin 8) of about 250
ohms. The power amplifier requires a DC path to the supply voltage through a series inductor, which can be part of the output matching
network. A 50 ohm antenna matching network is shown in the
Typical Application Circuit
section. The matching network also suppresses
carrier harmonics to aid in compliance testing.
See description for Pin 5
The Frequency Deviation Pins set the amount of deviation between data logic states in FSK mode. Frequency deviation is programmable
through pins 11, 12, 13 as shown in the table below:
DEV
∆
.125 x Max
.250 x Max
.375 x Max
.500 x Max
.625 x Max
.750 x Max
.875 x Max
Max
DEV 2
0
0
0
0
1
1
1
1
DEV 1
0
0
1
1
0
0
1
1
DEV 0
0
1
0
1
0
1
0
1
Clk1
0
0
1
1
Clk
Out
0
fc/4
fc/8
fc/16
5
Clk
Out
7
ES
Out
8
PA
Out
10, 9
Clk[1..0]
13, 12, 11
FreqDev[2..0]
Deviation values are approximate and apply to a properly loaded crystal. Crystal characteristics and loading behavior can vary between
suppliers.
14
Xtal1
External Crystal Input 1 presents a capacitance of 3 pF to GND in ASK and FSK (Data
IN
logic low) modes. Circuit parasitics add to this
package capacitance, presenting a total load of about 4.5 pF.
External Crystal Input 2 presents a capacitance of 3 pF to GND in ASK and FSK(Data
IN
logic low) mode. Circuit parasitics add to this
package capacitance, presenting a total load of about 4.5 pF.
The External Ref Input allows an external frequency source to be used to obtain the desired transmit frequency. In this case, the Xtal1
input must be bypassed with a 0.01µF capacitor, and a 0.01µF series capacitance should be added into External Reference input.
15
Xtal2/REF
IN
Crystal Reference - the Xtal1 and Xtal2 inputs are designed to present a 3 pF load to GND to each reference crystal connection.
Including PCB parasitic capacitances, this increases to about 4.5 pFat each connection. In ASK mode, the full 3 pF load is applied to the
crystal allowing it to oscillate at the desired frequency. In FSK mode, a portion of the 3 pF load is removed in response to a logic high
being applied to the Data
IN
(pin 2) as set by the frequency deviation pins DEV[0..2] (11,12,13). To achieve larger frequency deviations,
use a crystal with large motional capacitance or reduce PCB parasitic capacitance to the extent possible.
Connect to system ground.
16
GND
Note: The ground pad in the middle of the package is the power amplifier ground. It must be connected to system ground thru a low
inductance path.
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Page 4 of 11
TXC100 - 08/18/10
Absolute Maximum Ratings
Parameter
Symbol
Min
Operating Temperature Range
Junction Temperature Range
Storage Temperature Ragne
Supply Voltage - Vdd to GND
All pins to GND
T
O
T
J
T
S
V
S
-40
-40
-60
-0.3
-0.3
Limit Values
Max
+125
+150
+150
+4
Vdd + 0.3
°C
°C
°C
V
V
Unit
Note:
Maximum ratings must not be exceeded under any circumstances and can cause permanent damage to the IC
DC Electrical Characteristic
(Typical values taken at V
DD
= +3.0 V, T
A
= +25 °C, unless otherwise noted)
Limit Values
Characteristic
Supply Voltage
Current Consumption
0.2
Standby
I
STDBY
120
700
2.9
7
Supply
I
DD
1,4
10.5
3.3
7.3
10
Digital Inputs
Data Input Low
Data Input High
Max Input Current
Digital Outputs
Output Voltage Low
Output Voltage High
V
OL
V
OH
V
DD
-0.25
0.25
V
V
Clkout, Load = 10 pF
Clkout, Load = 10 pF
V
IL
V
IH
I
I
V
DD
-0.25
15.5
20
0.25
V
V
µA
1
300
1600
4.3
10.7
17.1
4.8
11.4
18.1
mA
nA
T
A
= +25 °C
T
A
= +85 °C
T
A
= +125 °C
PA off, Data=0V (ASK)
50% duty cycle (ASK)
Data = V
DD
(FSK and ASK)
PA off, Data=0V (ASK)
50% duty cycle (ASK)
Data = V
DD
(FSK and ASK)
433 MHz Band
315 MHz Band
Sym
V
DD
Notes
min
2.1
typ
max
3.6
V
Unit
Test Conditions
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Page 5 of 11
TXC100 - 08/18/10