SM33T Series 1.8 V
CMOS Clock Oscillators
February 2009
• Pletronics’ SM33 Series is a quartz crystal
controlled precision square wave generator with a
CMOS output.
• The package is designed for high density surface
mount designs.
• This is a low cost mass produced oscillator.
• Tape and Reel or cut tape packaging is available.
0.75 to 50 MHZ
2.0 x 2.5 mm LCC Ceramic Package
Enable/Disable Function
Disable function includes low standby power
mode
• Low Jitter
•
•
•
•
Pletronics Inc. certifies this device is in accordance with the
RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following:
Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s
Weight of the Device: 0.022 grams
Moisture Sensitivity Level: 1 As defined in J-STD-020C
Second Level Interconnect code: e4
Absolute Maximum Ratings:
Parameter
V
CC
Supply Voltage
Vi
Vo
Io
Input Voltage
Output Voltage
Output Current
Unit
-0.5V to +7.0V
-0.5V to V
CC
+ 0.5V
-0.5V to V
CC
+ 0.5V
+25 mA to -25 mA
Thermal Characteristics
The maximum die or junction temperature is 155
o
C
The thermal resistance junction to board is 50 to 70
o
C/Watt depending on the solder pads, ground plane
and construction of the PCB.
Product information is current as of publication date. The product conforms
to specifications per the terms of the Pletronics standard warranty. Production
processsing does not necessarily include testing of all parameters.
Copyright © 2009, Pletronics Inc.
SM33T Series 1.8 V
CMOS Clock Oscillators
February 2009
Part Number:
SM33
45
T
E
X
-
75.0M
-XX
Packaging code or blank
T250
= 250 per Tape and Reel
T500
= 500 per Tape and Reel
T1K
= 1000 per Tape and Reel
Frequency in MHz
Supply Voltage V
CC
X
= 1.8V _ 5%
+
Temperature Range
Blank
= Temp. range -10 to +70
o
C
E
= Temp. range -40 to +85
o
C
Series Model
Frequency Stability
44
= _ 25 ppm
+
45
= + 50 ppm
_
00
= + 100 ppm
_
Series Model
Marking Legend:
P
= Pletronics
FF.FF
= Frequency in MHZ
YMD
= Date of Manufacture (year and week, or year-month-day)
All other marking is internal factory codes
Specifications such as frequency stability, supply voltage and operating temperature range, etc. are
not identified from the marking. External packaging labels and packing list will correctly identify the
ordered Pletronics part number.
Codes for Date Code YMD
Code
Year
Code
Month
Code
Day
Code
Day
Code
Day
1
1
D
13
T
25
8
2008
A
JAN
2
2
E
14
U
26
9
2009
B
FEB
3
3
F
15
V
27
C
MAR
4
4
G
16
W
28
0
2010
D
APR
1
2011
E
MAY
5
5
H
17
X
29
F
JUN
6
6
J
18
Y
30
2
2012
G
JUL
7
7
K
19
Z
31
H
AUG
8
8
L
20
J
SEP
9
9
M
21
K
OCT
A
10
N
22
L
NOV
B
11
P
23
M
DEC
C
12
R
24
Part Marking:
PFF.FF
C
YMDxx
www.pletronics.com
425-776-1880
2
SM33T Series 1.8 V
CMOS Clock Oscillators
February 2009
Electrical Specification for 1.80V _5% over the specified temperature range
+
Item
Frequency Range
Frequency Accuracy
“00"
“45
“44
Min
0.75
-100
-50
-25
Max
50
100
50
25
CMOS
90
-
-
40
50
-
70
V
OUT
= V
CC
V
OUT
= 0V
Standby Current I
CC
Operating Current I
CC
-10
-10
-
-
-
10
10
60
-
30
-
+10
+10
10
2.5
3.0
3.5
10
150
10
+5
+70
+85
+100
%
%
nS
%
Kohm
%
%
uA
uA
uA
mA
Fout < 20 MHz
20 MHz >= Fout <40 MHz
Fout >= 40MHz
Time for output to reach a logic state
Time for output to reach a high Z state
Time for output to reach specified frequency
First year at 25
o
C
Standard Temperature Range
Extended Temperature Range
“E” Option
Pad 1 low, device disabled
at 50% point of V
CC
to V
CC
of V
CC
applied to pad 1
of V
CC
Cload = 15 pF (See load circuit)
Unit
MHz
ppm
For all supply voltages, load changes, aging for 1
year, shock, vibration and temperatures
Condition
Output Waveform
Output High Level
Output Low Level
Rise and Fall Time
Output Symmetry
Enable/Disable Internal Pull-up
V disable
V enable
Output leakage
Enable time
Disable time
Start up time
Aging
Operating Temperature Range
-
-
-
-5
-10
-40
mS
nS
mS
ppm
o
o
o
C
C
C
Storage Temperature Range
-55
Phase Noise Performance
\
0
-20
-40
-60
dBc/Hz
-80
-100
-120
-140
-160
-180
10
1,000
100,000
10,000,000
19.4M
25M
32M
50M
Frequency (Hz)
www.pletronics.com
425-776-1880
3
SM33T Series 1.8 V
CMOS Clock Oscillators
February 2009
Load Circuit and Test Waveform
Symmetry
Vhigh
90% * Vcc
50% * Vcc
10% * Vcc
Vlow
Ground
Trise
Tfall
Reliability
: Environmental Compliance
Parameter
Mechanical Shock
Vibration
Solderability
Thermal Shock
Condition
MIL-STD-883 Method 2002, Condition B
MIL-STD-883 Method 2007, Condition A
MIL-STD-883 Method 2003
MIL-STD-883 Method 1011, Condition A
ESD Rating
Model
Human Body Model
Charged Device Model
Minimum Voltage
1500
1000
Conditions
MIL-STD-883 Method 3115
JESD 22-C101
Package Labeling
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Courier New
Bar code is 39-Full ASCII
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Arial
www.pletronics.com
425-776-1880
4
SM33T Series 1.8 V
CMOS Clock Oscillators
February 2009
Mechanical:
Inches
A
0.098 +0.004
_
0.079 +0.004
_
0.039 +0.004
_
0.008
0.028
0.004
0.031
mm
2.50 +0.10
_
2.00 +0.10
_
1.00 +0.10
_
0.20R
0.70
0.10
0.80
4
3
5
1
2
B
C
6
D
1
E
1
F
1
G
1
Not to Scale
1
Typical dimensions
1.27 to 8.89 µm
Contacts :
Gold 11.8 µinches
0.3 µm minimum over Nickel 50 to 350 µinches
Pad
1
Function
Output
Enable/Disable
Ground (GND)
Output
Supply Voltage
(V
CC
)
Note
When this pad is not connected the oscillator shall operate.
When this pad is logic low the output will be inhibited (high impedance state.)
Recommend connecting this pad to V
CC
if the oscillator is to be always on.
2
3
4
Recommend connecting appropriate power supply bypass capacitors as close as
possible.
Layout and application information
For Optimum Jitter Performance, Pletronics recommends:
•
a ground plane under the device
•
no large transient signals (both current and voltage) should be routed under the device
•
do not layout near a large magnetic field such as a high frequency switching power supply
•
do not place near piezoelectric buzzers or mechanical fans.
www.pletronics.com
425-776-1880
5
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
