Finisar
Preliminary Product Specification
4Gbps Long-Reach DWDM SFP Transceiver
FWLF1634Ryxx
PRODUCT FEATURES
•
•
•
•
•
•
•
•
•
•
•
Up to 4.25 Gb/s bi-directional links
Hot-pluggable SFP footprint
Temperature-stabilized DWDM-
rated DFB laser transmitter
100GHz ITU Grid, C-Band
Low dispersion DFB laser
Extended operating range: -5°C to
70°C case temperature
Wavelength controlled within
±
0.1
nm over life and temperature
Extended link budget with APD
receiver technology
4x FC compliant
1x/2x, GbE compliant*
OC-48 LR-2 compliant*
•
•
•
APPLICATIONS
Amplified DWDM networks
Bandwidth aggregation
Ring topologies with fixed and
reconfigurable OADMs
Finisar’s Dense Wavelength-Division Multiplexing (DWDM) transceivers offer DWDM
transport with dramatically lower power and cost in a standard pluggable Small Form
Factor Pluggable (SFP) package
1
. The FWLF1634R is designed expressly for service
providers deploying DWDM networking equipment in metropolitan access and core
networks.
Basic digital diagnostic features for the FWLF1634R are implemented as described in
Finisar Application Note AN-2030, “Digital Diagnostic Monitoring Interface for Optical
Transceivers”
4
. Enhanced diagnostic features are available as described in the DWDM
SFP MSA
6
.
(*when ordered with rate selection option, and used in low rate mode)
©
Finisar Corporation
Rev C2, Feb.2009
PRELIMINARY
Page 1
Finisar
PRODUCT SELECTION
FWLF1634Ryxx
y
xx
L
V
Non Rate Selectable - 4x Fibre Channel
Rate Selectable - 1x, 2x, Fibre Channel, Gigabit Ethernet
DWDM Wavelength (see table below)
Product Code
FWLF1634Ry17
FWLF1634Ry18
FWLF1634Ry19
FWLF1634Ry20
FWLF1634Ry21
FWLF1634Ry22
FWLF1634Ry23
FWLF1634Ry24
FWLF1634Ry25
FWLF1634Ry26
FWLF1634Ry27
FWLF1634Ry28
FWLF1634Ry29
FWLF1634Ry30
FWLF1634Ry31
FWLF1634Ry32
FWLF1634Ry33
FWLF1634Ry34
FWLF1634Ry35
FWLF1634Ry36
FWLF1634Ry37
FWLF1634Ry38
FWLF1634Ry39
FWLF1634Ry40
FWLF1634Ry41
FWLF1634Ry42
FWLF1634Ry43
FWLF1634Ry44
FWLF1634Ry45
FWLF1634Ry46
FWLF1634Ry47
FWLF1634Ry48
FWLF1634Ry49
FWLF1634Ry50
FWLF1634Ry51
FWLF1634Ry52
FWLF1634Ry53
FWLF1634Ry54
FWLF1634Ry55
FWLF1634Ry56
FWLF1634Ry57
FWLF1634Ry58
FWLF1634Ry59
FWLF1634Ry60
FWLF1634Ry61
Frequency (THz)
191.7
191.8
191.9
192.0
192.1
192.2
192.3
192.4
192.5
192.6
192.7
192.8
192.9
193.0
193.1
193.2
193.3
193.4
193.5
193.6
193.7
193.8
193.9
194.0
194.1
194.2
194.3
194.4
194.5
194.6
194.7
194.8
194.9
195.0
195.1
195.2
195.3
195.4
195.5
195.6
195.7
195.8
195.9
196.0
196.1
Center Wavelength (nm)
1563.86
1563.05
1562.23
1561.42
1560.61
1559.79
1558.98
1558.17
1557.36
1556.55
1555.75
1554.94
1554.13
1553.33
1552.52
1551.72
1550.92
1550.12
1549.32
1548.51
1547.72
1546.92
1546.12
1545.32
1544.53
1543.73
1542.94
1542.14
1541.35
1540.56
1539.77
1538.98
1538.19
1537.40
1536.61
1535.82
1535.04
1534.25
1533.47
1532.68
1531.90
1531.12
1530.33
1529.55
1528.77
©
Finisar Corporation
Rev C2, Feb.2009
PRELIMINARY
Page 2
FWLF1634Ryxx DWDM SFP Preliminary Product Specification – February 2009
Finisar
I.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Descriptions
Symbol
V
EET
T
FAULT
T
DIS
MOD_DEF(2)
MOD_DEF(1)
MOD_DEF(0)
Rate Select
LOS
V
EER
V
EER
V
EER
RD-
RD+
V
EER
V
CCR
V
CCT
V
EET
TD+
TD-
V
EET
Name/Description
Transmitter Ground (Common with Receiver Ground)
Transmitter Fault
Transmitter Disable. Laser output disabled on high or open
Module Definition 2. Data line for Serial ID
Module Definition 1. Clock line for Serial ID
Module Definition 0. Grounded within the module
No connection required
Loss of Signal indication. Logic 0 indicates normal operation
Receiver Ground (Common with Transmitter Ground)
Receiver Ground (Common with Transmitter Ground)
Receiver Ground (Common with Transmitter Ground)
Receiver Inverted DATA out. AC Coupled
Receiver Non-inverted DATA out. AC Coupled
Receiver Ground (Common with Transmitter Ground)
Receiver Power Supply
Transmitter Power Supply
Transmitter Ground (Common with Receiver Ground)
Transmitter Non-Inverted DATA in. 100 ohm termination between TD+
and TD-, AC Coupled thereafter
Transmitter Inverted DATA in. See TD+
Transmitter Ground (Common with Receiver Ground)
Ref.
1
2
3
3
3
4
5
1
1
1
1
1
1
Notes:
1. Circuit ground is internally isolated from chassis ground.
2. Laser output disabled on T
DIS
>2.0V or open, enabled on T
DIS
<0.8V.
3. Should be pulled up with 4.7k – 10kohms on host board to a voltage between 2.0V and 5.5V.
MOD_DEF(0) pulls line low to indicate module is plugged in.
4. Receiver achieves multi-rate operation without active control.
5. LOS is open collector output. Should be pulled up with 4.7k – 10kohms on host board to a voltage between 2.0V and
5.5V. Logic 0 indicates normal operation; logic 1 indicates loss of signal.
VeeT
1
2
3
4
VeeT
TD-
TXFault
TD+
TX Disable
VeeT
MOD-DEF(2)
VccT
20
19
18
17
16
15
14
13
12
11
Towards
Bezel
5
6
7
8
9
10
MOD-DEF(1)
VccR
MOD-DEF(0)
VeeR
Rate Select
RD+
LOS
RD-
VeeR
VeeR
VeeR
Towards
ASIC
Diagram of Host Board Connector Block Pin Numbers and Names
©
Finisar Corporation
Rev C2, Feb.2009
PRELIMINARY
Page 3
FWLF1634Ryxx DWDM SFP Preliminary Product Specification – February 2009
Finisar
II.
Absolute Maximum Ratings
Symbol
Vcc
T
S
T
OP
Min
-0.5
-10
-5
Typ
Max
4.7
85
70
Unit
V
°C
°C
Parameter
Maximum Supply Voltage
Storage Temperature
Case Operating Temperature
III.
Electrical Characteristics
(T
OP
= -5 to 70
°
C, V
CC
= 3.13 to 3.50 Volts)
Symbol
Vcc
Icc
I
surge
Pmax
R
in
Vin,pp
V
D
V
EN
Vout,pp
t
r
t
f
V
LOS fault
V
LOS norm
PSR
Min
3.13
Typ
3.30
Max
3.50
325
Icc+30
1.25
Unit
V
mA
mA
W
Ω
mV
V
V
mV
ps
ps
V
V
mVpp
Ref.
BOL
BOL
Parameter
Supply Voltage
Supply Current
Inrush Current
Maximum Power
TRANSMITTER
Input differential impedance
Single ended data input swing
Transmit Disable Voltage
Transmit Enable Voltage
RECEIVER
Single ended data output swing
Data output rise time
Data output fall time
LOS Fault
LOS Normal
Power Supply Rejection
Notes:
1.
2.
3.
4.
5.
6.
100
250
Vcc – 1.3
Vee
175
1200
Vcc
Vee+ 0.8
1000
120
120
Vcc
HOST
Vee+0.5
1
2
3
4
4
5
5
6
Vcc – 0.5
Vee
100
Connected directly to TX data input pins. AC coupled thereafter.
Or open circuit.
Into 100 ohms differential termination.
20 – 80 %
Loss of signal (LOS) is LVTTL. Logic 0 indicates normal operation; logic 1 indicates no signal detected.
Receiver sensitivity is compliant with power supply sinusoidal modulation of 20 Hz to 1.5 MHz up to specified
value applied through the recommended power supply filtering network.
©
Finisar Corporation
Rev C2, Feb.2009
PRELIMINARY
Page 4
FWLF1634Ryxx DWDM SFP Preliminary Product Specification – February 2009
Finisar
IV.
Low Speed Signals
Symbol
Min
-42
0.5
t_loss_on
t_loss_off
t_off
Typ
-36
-34
2
Max
Units Notes/Conditions
dBm
dBm
dB
µsec
From detection of loss of signal
to assertion of RX_LOS
µsec
From detection of presence of
signal to negation of RX_LOS
µsec
Rising edge of TX_DISABLE to
fall of output signal below 10%
of nominal
µsec
Falling edge of TX_DISABLE
to rise of output signal above
90% of nominal. Time
indicated is under steady-state
temperature conditions.
µsec
TX_DISABLE HIGH before
TX_DISABLE set LOW
nm TX_Fault will assert before the
device is outside of specified
wavelength range
Parameter
RX_LOS Assert Level
RX_LOS De-assert Level
RX_LOS Hysteresis
RX_LOS Assert Delay
RX_LOS Negate Delay
TX_DISABLE Assert Time
-28
100
100
10
TX_DISABLE Negate Time
t_on
1000
TX_DISABLE Reset Time
TX_FAULT Assert
t_reset
10
-0.2
+0.2
©
Finisar Corporation
Rev C2, Feb.2009
PRELIMINARY
Page 5
FPGA/CPLD
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