SE95
Ultra high accuracy digital temperature sensor and thermal
watchdog
Rev. 07 — 2 September 2009
Product data sheet
1. General description
The SE95 is a temperature-to-digital converter using an on-chip band gap temperature
sensor and Sigma Delta analog-to-digital conversion technique. The device is also a
thermal detector providing an overtemperature detection output.
The SE95 contains a number of data registers accessed by a controller via the 2-wire
serial I
2
C-bus interface:
•
Configuration register (Conf) to store the device settings such as sampling rate,
device operation mode, OS operation mode, OS polarity, and OS fault queue
•
Temperature register (Temp) to store the digital Temp reading
•
Set-point registers (Tos and Thyst) to store programmable overtemperature shutdown
and hysteresis limits
•
Identification register (ID) to store manufacturer numbers
The device includes an open-drain output (pin OS) which becomes active when the
temperature exceeds the programmed limits. There are three selectable logic address
pins (pins A2 to A0) so that eight devices can be connected on the same bus without
address conflict.
The SE95 can be configured for different operation conditions. It can be set in normal
mode to periodically monitor the ambient temperature, or in shutdown mode to minimize
power consumption. The OS output operates in either of two selectable modes: OS
comparator mode and OS interrupt mode. Its active state can be selected as either HIGH
or LOW. The fault queue that defines the number of consecutive faults in order to activate
the OS output is programmable as well as the set-point limits.
The temperature register always stores a 13-bit two’s complement data giving a
temperature resolution of 0.03125
°C.
This high temperature resolution is particularly
useful in applications of measuring precisely the thermal drift or runaway. For normal
operation and compatibility with the LM75A, only the 11 MSBs are read, with a resolution
of 0.125
°C
to provide the accuracies specified. To be compatible with the LM75, read only
the 9 MSBs.
The device is powered-up in normal operation mode with the OS in comparator mode,
temperature threshold of 80
°C
and hysteresis of 75
°C,
so that it can be used as a
stand-alone thermostat with those pre-defined temperature set points. The conversion
rate is programmable, with a default of 10 conversions/s.
NXP Semiconductors
SE95
Ultra high accuracy digital temperature sensor and thermal watchdog
2. Features
I
I
I
I
I
I
I
I
I
I
I
I
Pin-for-pin replacement for industry standard LM75/LM75A
Specification of a single part over supply voltage from 2.8 V to 5.5 V
Small 8-pin package types: SO8 and TSSOP8 (MSOP8)
I
2
C-bus interface to 400 kHz with up to 8 devices on the same bus
Supply voltage from 2.8 V to 5.5 V
Temperature range from
−55 °C
to +125
°C
13-bit ADC that offers a temperature resolution of 0.03125
°C
Temperature accuracy of
±
1
°C
from
−25 °C
to +100
°C
Programmable temperature threshold and hysteresis set points
Supply current of 7.0
µA
in shutdown mode for power conservation
Stand-alone operation as thermostat at power-up
ESD protection exceeds 1000 V for Human Body Model (HBM) per JESD22-A114 and
150 V for Machine Model (MM) per JESD22-A115
I
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
3. Applications
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System thermal management
Personal computers
Electronics equipment
Industrial controllers
4. Ordering information
Table 1.
Type
number
SE95D
SE95DP
SE95U
Ordering information
Package
Temperature range
−55 °C
to +125
°C
−55 °C
to +125
°C
−55 °C
to +125
°C
Name
SO8
TSSOP8
-
Description
plastic small outline package; 8 leads; body width 3.9 mm
plastic thin shrink small outline package; 8 leads;
body width 3 mm
wafer
Version
SOT96-1
SOT505-1
-
SE95_7
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 — 2 September 2009
2 of 27
NXP Semiconductors
SE95
Ultra high accuracy digital temperature sensor and thermal watchdog
5. Block diagram
SE95
ADC CONTROL AND OTP CONTROL
OTP
8
V
CC
BIAS
bit
stream
Conf
Temp
BAND GAP
SIGMA DELTA
MODULATOR
OSCILLATOR
Tos
DECIMATION
FILTER
Thyst
INTERRUPTION
LOGIC
POR
REGISTER
BANK
3
I
2
C-BUS INTERFACE LOGIC
5
A2
6
A1
7
A0
2
SCL
1
SDA
4
GND
002aae892
OS
Fig 1.
Block diagram of SE95
6. Pinning information
6.1 Pinning
SDA
SCL
OS
GND
1
2
8
7
V
CC
A0
A1
A2
SDA
SCL
OS
GND
1
2
3
4
002aac536
8
7
V
CC
A0
A1
A2
SE95D
3
4
002aac537
6
5
SE95DP
6
5
Fig 2.
Pin configuration for SO8
Fig 3.
Pin configuration for TSSOP8
6.2 Pin description
Table 2.
Symbol
SDA
SCL
OS
GND
A2
Pin description
Pin
1
2
3
4
5
Description
I
2
C-bus serial bidirectional data line digital I/O; open-drain
I
2
C-bus serial clock digital input
overtemperature shutdown output; open-drain
ground; to be connected to the system ground
user-defined address bit 2 digital input
SE95_7
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 — 2 September 2009
3 of 27
NXP Semiconductors
SE95
Ultra high accuracy digital temperature sensor and thermal watchdog
Pin description
…continued
Pin
6
7
8
Description
user-defined address bit 1 digital input
user-defined address bit 0 digital input
supply voltage
Table 2.
Symbol
A1
A0
V
CC
7. Functional description
7.1 General operation
The SE95 uses the on-chip band gap sensor to measure the device temperature with a
resolution of 0.03125
°C
and stores the 13-bit two’s complement digital data, resulting
from 13-bit analog to digital conversion, into register Temp. Register Temp can be read at
any time by a controller on the I
2
C-bus. Reading temperature data does not affect the
conversion in progress during the read operation.
The device can be set to operate in either mode: normal or shutdown mode. In normal
operation mode, by default, the temperature-to-digital conversion is executed every
100 ms and register Temp is updated at the end of each conversion. In shutdown mode,
the device becomes idle, data conversion is disabled and register Temp holds the latest
result; however, the device I
2
C-bus interface is still active and register write/read operation
can be performed. The device operation mode is controlled by programming bit
SHUTDOWN of register Conf. The temperature conversion is initiated when the device is
powered up or returned to normal mode from shutdown mode.
In addition, at the end of each conversion in normal mode, the temperature data (or Temp)
in register Temp is automatically compared with the overtemperature shutdown threshold
data (or Tos) stored in register Tos, and the hysteresis data (or Thyst) stored in register
Thyst, in order to set the state of the device OS output accordingly. The registers Tos and
Thyst are write/read capable, and both operate with 9-bit two’s complement digital data.
To match with this 9-bit operation, register Temp uses only the 9 MSB bits of its 13-bit data
for the comparison.
The device temperature conversion rate is programmable and can be chosen to be one of
the four values: 0.125, 1.0, 10, and 30 conversions/s. The default conversion rate is
10 conversions/s. Furthermore, the conversion rate is selected by programming bits
RATEVAL[1:0] of register Conf as shown in
Table 6.
Note that the average supply current
as well as the device power consumption increase with the conversion rate.
The way that the OS output responds to the comparison operation depends upon the OS
operation mode selected by configuration bit OS_COMP_INT, and the user-defined fault
queue defined by configuration bits OS_F_QUE[1:0].
In OS comparator mode, the OS output behaves like a thermostat. It becomes active
when the temperature exceeds T
os
, and is reset when the temperature drops below T
hyst
.
Reading the device registers or putting the device into shutdown mode does not change
the state of the OS output. The OS output in this case can be used to control cooling fans
or thermal switches.
SE95_7
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 — 2 September 2009
4 of 27
NXP Semiconductors
SE95
Ultra high accuracy digital temperature sensor and thermal watchdog
In OS interrupt mode, the OS output is used for thermal interruption. When the device is
powered-up, the OS output is first activated only when Temp exceeds T
os
; then it remains
active indefinitely until being reset by a read of any register. Once the OS output has been
activated by crossing T
os
and then reset, it can be activated again only when Temp drops
below T
hyst
; then again, it remains active indefinitely until being reset by a read of any
register. The OS interrupt operation would be continued in this sequence: T
os
trip, reset,
T
hyst
trip, reset, T
os
trip, reset, T
hyst
trip, reset, and etc. Putting the device into shutdown
mode also resets the OS output.
In both cases, comparator mode and interrupt mode, the OS output is activated only if a
number of consecutive faults, defined by the device fault queue, has been met. The fault
queue is programmable and stored in bits OS_F_QUE[1:0], of register Conf. Also, the OS
output active state is selectable as HIGH or LOW by setting accordingly the bit OS_POL
of register Conf.
At power-up, the device is put into normal operation mode, register Tos is set to 80
°C,
register Thyst is set to 75
°C,
OS active state is selected LOW and the fault queue is equal
to 1. The data reading of register Temp is not available until the first conversion is
completed in about 33 ms.
The OS response to the temperature is illustrated in
Figure 4.
T
os
T
hyst
reading temperature limits
OS RESET
OS ACTIVE
OS output in comparator mode
OS RESET
OS ACTIVE
(1)
(1)
(1)
OS output in interrupt mode
001aad623
(1) OS is reset by either reading register or putting the device in shutdown mode. Assumed that the
fault queue is met at each T
os
and T
hyst
crossing point.
Fig 4.
OS response to temperature
SE95_7
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 — 2 September 2009
5 of 27
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