MC10EP142, MC100EP142
3.3V / 5V ECL 9-Bit Shift
Register
The MC10EP/100EP142 is a 9–bit shift register, designed with
byte-parity applications in mind. The E142 performs serial/parallel in
and serial/parallel out, shifting in one direction. The nine inputs
D0 – D8 accept parallel input data, while S–IN accepts serial input
data. The Qn outputs do not need to be terminated for the shift
operation to function. To minimize noise and power, any Q output not
used should be left unterminated.
The SEL (Select) input pin is used to switch between the two modes
of operation – SHIFT and LOAD. The shift direction is from bit 0 to
bit 8. Input data is accepted by the registers a set–up time before the
positive going edge of CLK0 or CLK1; shifting is also accomplished
on the positive clock edge. A HIGH on the Master Reset pin (MR)
asynchronously resets all the resisters to zero.
The 100 Series contains temperature compensation.
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MARKING
DIAGRAM*
TQFP–32
FA SUFFIX
CASE 873A
MCXXX
EP142
AWLYYWW
32
1
•
•
•
•
•
>3 GHz Minimum Shift Frequency
9-Bit for Byte–Parity Applications
Asynchronous Master Reset
Dual Clocks
XXX
A
WL
YY
WW
PECL Mode Operating Range: V
CC
= 3.0 V to 5.5 V
with V
EE
= 0 V
•
NECL Mode Operating Range: V
CC
= 0 V
with V
EE
= –3.0 V to –5.5 V
•
Open Input Default State
= 10 OR 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
*For additional information, refer to Application Note
AND8002/D
•
Safety Clamp on Inputs
ORDERING INFORMATION
Device
MC10EP142FA
MC10EP142FAR2
MC100EP142FA
MC100EP142FAR2
Package
TQFP–32
Shipping
250 Units/Tray
TQFP–32 2000/Tape & Reel
TQFP–32
250 Units/Tray
TQFP–32 2000/Tape & Reel
©
Semiconductor Components Industries, LLC, 2001
1
October, 2001 – Rev. 4
Publication Order Number:
MC10EP142/D
MC10EP142, MC100EP142
V
CC
Q8
Q7
Q7
Q6
Q5
D7
D8
PIN DESCRIPTION
24
D6
D5
D4
V
EE
D3
D2
D1
V
CC
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
23
22
21
20
19
18
17
16
15
14
V
EE
Q4
Q3
V
CC
Q2
Q1
Q0
MR
PIN
D0* – D8*
S–IN*, S–IN**
SEL*
CLK0*, CLK1*,
CLK0**, CLK1**
MR*
Q0 – Q8
Q7
V
CC
V
EE
FUNCTION
ECL Parallel Data Inputs
ECL Differential Serial Data Input
ECL Mode Select Input
ECL Differential Clock Inputs
ECL Master Reset
ECL Data Outputs
ECL Data Output
Positive Supply
Negative Supply
MC10EP142
MC100EP142
13
12
11
10
9
* Pins will default LOW when left open.
** Pins will default to V
CC
/2 when left open.
S–IN
CLK0
CLK0
CLK1
CLK1
CLK1
Z
Z
Z
Z
S–IN
SEL
Q0
D0
L
H
L
D0
Warning: All V
CC
and V
EE
pins must be externally con-
nected to Power Supply to guarantee proper operation.
Figure 1. 32–Lead TQFP Pinout
(Top View)
TRUTH TABLE
Function*
Load
Shift
SEL
L
H
H
Reset
X
S–IN
X
L
H
X
MR
L
L
L
H
CLK0
Z
Z
Z
Z
Q1
D1
Q0
Q0
L
Q2
D2
Q1
Q1
L
Q3
D3
Q2
Q2
L
Q4
D4
Q3
Q3
L
Q5
D5
Q4
Q4
L
Q6
D6
Q5
Q5
L
Q7
D7
Q6
Q6
L
Q8
D8
Q7
Q7
L
Q9
D9
Q8
Q8
L
* All functions are accomplished on the positive edge of CLK0 or CLK1.
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2
MC10EP142, MC100EP142
S-IN
S-IN
D0
1
0
D
Q
Q0
D1
1
0
D
Q
Q1
D2
1
0
D
Q
Q2
D3
1
0
D
Q
Q3
D4
1
0
D
Q
Q4
D5
1
0
D
Q
Q5
1
D6
0
D
Q
Q6
D7
1
0
D
Q
Q
Q7
Q7
D8
SEL
MR
CLK0
CLK0
CLK1
CLK1
1
0
D
Q
Q8
V
CC
V
EE
Figure 2. Logic Diagram
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3
MC10EP142, MC100EP142
ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Value
75 kW
37.5 kW
> 2 kV
> 100 V
> 2 kV
Level 2
UL–94 code V–0 A 1/8”
28 to 34
405 Devices
Moisture Sensitivity (Note 1)
Flammability Rating
Oxygen Index
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, refer to Application Note AND8003/D.
MAXIMUM RATINGS
(Note 2)
Symbol
V
CC
V
EE
V
I
I
out
TA
T
stg
θ
JA
θ
JC
T
sol
Parameter
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode In ut Voltage
Input
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction to Ambient)
Thermal Resistance (Junction to Case)
Wave Solder
0 LFPM
500 LFPM
std bd
<2 to 3 sec @ 248°C
32 TQFP
32 TQFP
32 TQFP
Condition 1
V
EE
= 0 V
V
CC
= 0 V
V
EE
= 0 V
V
CC
= 0 V
Continuous
Surge
V
I
V
CC
V
I
V
EE
Condition 2
Rating
8
–8
6
–6
50
100
0 to +85
–65 to +150
80
55
12 to 17
265
Units
V
V
V
V
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C
2. Maximum Ratings are those values beyond which device damage may occur.
10EP DC CHARACTERISTICS, PECL
V
CC
= 3.3 V, V
EE
= 0 V (Note 3)
–40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
V
IHCMR
I
IH
I
IL
Characteristic
Power Supply Current
Output HIGH Voltage (Note 4)
Output LOW Voltage (Note 4)
Input HIGH Voltage (Single Ended)
Input LOW Voltage (Single Ended)
Input HIGH Voltage Common Mode
Range (Differential) (Note 5)
Input HIGH Current
Input LOW Current
D
D
0.5
–150
Min
105
2165
1365
2090
1365
2.0
Typ
125
2290
1490
Max
145
2415
1615
2415
1690
3.3
150
0.5
–150
Min
105
2230
1430
2155
1460
2.0
25°C
Typ
125
2355
1555
Max
145
2480
1680
2480
1755
3.3
150
0.5
–150
Min
105
2290
1490
2215
1490
2.0
85°C
Typ
125
2415
1615
Max
145
2540
1740
2540
1815
3.3
150
Unit
mA
mV
mV
mV
mV
V
µA
µA
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
3. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.3 V to –2.2 V.
4. All loading with 50 ohms to V
CC
–2.0 volts.
5. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential
input signal.
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4
MC10EP142, MC100EP142
10EP DC CHARACTERISTICS, PECL
V
CC
= 5.0 V, V
EE
= 0 V (Note 6)
–40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
V
IHCMR
I
IH
I
IL
Characteristic
Power Supply Current (Note 7)
Output HIGH Voltage (Note 8)
Output LOW Voltage (Note 8)
Input HIGH Voltage (Single Ended)
Input LOW Voltage (Single Ended)
Input HIGH Voltage Common Mode
Range (Differential) (Note 9)
Input HIGH Current
Input LOW Current
D
D
0.5
–150
Min
105
3865
3065
3790
3065
2.0
Typ
125
3990
3190
Max
145
4115
3315
4115
3390
5.0
150
0.5
–150
Min
105
3930
3130
3855
3130
2.0
25°C
Typ
125
4055
3255
Max
145
4180
3380
4180
3455
5.0
150
0.5
–150
Min
105
3990
3190
3915
3190
2.0
85°C
Typ
125
4115
3315
Max
145
4240
3440
4240
3515
5.0
150
Unit
mA
mV
mV
mV
mV
V
µA
µA
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
6. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +2.0 V to –0.5 V.
7. Required 500 lfpm air flow when using +5 V power supply. For (V
CC
– V
EE
) >3.3 V, 5
W
to 10
W
in line with V
EE
required for maximum thermal
protection at elevated temperatures. Recommend V
CC
–V
EE
operation at
3.3 V.
8. All loading with 50 ohms to V
CC
–2.0 volts.
9. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential
input signal.
10EP DC CHARACTERISTICS, NECL
V
CC
= 0 V, V
EE
= –5.5 V to –3.0 V (Note 10)
–40°C
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
V
IHCMR
I
IH
I
IL
Characteristic
Power Supply Current (Note 11)
Output HIGH Voltage (Note 12)
Output LOW Voltage (Note 12)
Input HIGH Voltage (Single Ended)
Input LOW Voltage (Single Ended)
Input HIGH Voltage Common Mode
Range (Differential) (Note 13)
Input HIGH Current
Input LOW Current
D
D
0.5
–150
Min
105
–1135
–1935
–1210
–1935
V
EE
+2.0
Typ
125
–1010
–1810
Max
145
–885
–1685
–885
–1610
0.0
150
0.5
–150
Min
105
–1070
–1870
–1145
–1870
V
EE
+2.0
25°C
Typ
125
–945
–1745
Max
145
–820
–1620
–820
–1545
0.0
150
0.5
–150
Min
105
–1010
–1810
–1085
–1810
V
EE
+2.0
85°C
Typ
125
–885
–1685
Max
145
–760
–1560
–760
–1485
0.0
150
Unit
mA
mV
mV
mV
mV
V
µA
µA
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.
10. Input and output parameters vary 1:1 with V
CC
.
11. Required 500 lfpm air flow when using –5 V power supply. For (V
CC
– V
EE
) >3.3 V, 5
W
to 10
W
in line with V
EE
required for maximum thermal
protection at elevated temperatures. Recommend V
CC
–V
EE
operation at
3.3 V.
12. All loading with 50 ohms to V
CC
–2.0 volts.
13. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential
input signal.
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