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LTC2216CUP#PBF

产品描述LTC2216 - 16-Bit, 80Msps Low Noise ADC; Package: QFN; Pins: 64; Temperature Range: 0°C to 70°C
产品类别模拟混合信号IC    转换器   
文件大小2MB,共36页
制造商Linear ( ADI )
官网地址http://www.analog.com/cn/index.html
标准
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LTC2216CUP#PBF概述

LTC2216 - 16-Bit, 80Msps Low Noise ADC; Package: QFN; Pins: 64; Temperature Range: 0°C to 70°C

LTC2216CUP#PBF规格参数

参数名称属性值
Brand NameLinear Technology
是否Rohs认证符合
厂商名称Linear ( ADI )
零件包装代码QFN
包装说明HVQCCN, LCC64,.35SQ,20
针数64
制造商包装代码UP
Reach Compliance Codecompliant
ECCN代码3A001.A.5.A.5
最大模拟输入电压2.75 V
最小模拟输入电压
转换器类型ADC, PROPRIETARY METHOD
JESD-30 代码S-PQCC-N64
JESD-609代码e3
长度9 mm
最大线性误差 (EL)0.0053%
湿度敏感等级1
模拟输入通道数量1
位数16
功能数量1
端子数量64
最高工作温度70 °C
最低工作温度
输出位码OFFSET BINARY, 2'S COMPLEMENT BINARY
输出格式PARALLEL, WORD
封装主体材料PLASTIC/EPOXY
封装代码HVQCCN
封装等效代码LCC64,.35SQ,20
封装形状SQUARE
封装形式CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度)250
电源3.3 V
认证状态Not Qualified
采样速率80 MHz
采样并保持/跟踪并保持SAMPLE
座面最大高度0.8 mm
标称供电电压3.3 V
表面贴装YES
技术CMOS
温度等级COMMERCIAL
端子面层Matte Tin (Sn)
端子形式NO LEAD
端子节距0.5 mm
端子位置QUAD
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度9 mm
Base Number Matches1

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FEATURES
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LTC2216/LTC2215
16-Bit, 80Msps/65Msps
Low Noise ADC
DESCRIPTION
The LTC
®
2216/LTC2215 are 80Msps/65Msps sampling 16-
bit A/D converters designed for digitizing high frequency,
wide dynamic range signals with input frequencies up to
400MHz. The input range of the ADC is fixed at 2.75V
P-P
.
The LTC2216/LTC2215 are perfect for demanding com-
munications applications, with AC performance that
includes 81.5dBFS noise floor and 100dB spurious free
dynamic range (SFDR). Ultra low jitter of 85fs
RMS
allows
undersampling of high input frequencies while maintaining
excellent noise performance. Maximum DC specs include
±3.5LSB INL, ±1LSB DNL (no missing codes).
The digital output can be either differential LVDS or
single-ended CMOS. There are two format options for the
CMOS outputs: a single bus running at the full data rate or
demultiplexed buses running at half data rate. A separate
output power supply allows the CMOS output swing to
range from 0.5V to 3.6V.
The ENC
+
and ENC
inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed with a wide range of
clock duty cycles.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Sample Rate: 80Msps/65Msps
81.5dBFS Noise Floor
100dB SFDR
SFDR >95dB at 70MHz
85fs
RMS
Jitter
2.75V
P-P
Input Range
400MHz Full Power Bandwidth S/H
Optional Internal Dither
Optional Data Output Randomizer
LVDS or CMOS Outputs
Single 3.3V Supply
Power Dissipation: 970mW/700mW
Clock Duty Cycle Stabilizer
Pin-Compatible with LTC2208, LTC2217
64-Pin (9mm
×
9mm) QFN Package
APPLICATIONS
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Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
ATE
TYPICAL APPLICATION
3.3V
SENSE
V
CM
2.2μF
1.575V
COMMON MODE
BIAS VOLTAGE
INTERNAL ADC
REFERENCE
GENERATOR
OV
DD
0.5V TO 3.6V
1μF
OF
CLKOUT
D15
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
V
DD
GND
ENC
+
ENC
SHDN
DITH
MODE
LVDS
RAND
1μF
1μF
3.3V
1μF
22165 TA01
LTC2216: 64k Point FFT,
f
IN
= 4.9MHz, –1dBFS
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
10
20
30
FREQUENCY (MHz)
40
22165 TA01b
ANALOG
INPUT
AIN
S/H
AMP
16-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC AND
SHIFT REGISTER
OUTPUT
DRIVERS
CMOS
OR
LVDS
ADC CONTROL INPUTS
AMPLITUDE (dBFS)
AIN
+
+
22165f
1

 
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