LV88D Dual Frequency
LVDS Clock Oscillators
April 2010
Pletronics Inc. certifies this device is in accordance with the
RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following:
Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s
Weight of the Device: 0.16 grams
Moisture Sensitivity Level: 1 As defined in J-STD-020C
Second Level Interconnect code: e4
O
bs
o
Absolute Maximum Ratings:
Parameter
Unit
V
CC
Supply Voltage
Input Voltage
-0.5V to +7.0V
Vi
-0.5V to V
CC
+ 0.5V
-0.5V to V
CC
+ 0.5V
Vo
Output Voltage
Thermal Characteristics
The maximum die or junction temperature is 155
o
C
The thermal resistance junction to board is 30 to 50
o
C/Watt depending on the solder pads, ground plane
and construction of the PCB.
Product information is current as of publication date. The product conforms
to specifications per the terms of the Pletronics standard warranty. Production
processsing does not necessarily include testing of all parameters.
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Copyright © 2010, Pletronics Inc.
• Pletronics’ LV88D Series is a quartz crystal
controlled precision square wave generator with
an LVDS output.
• The package is designed for high density surface
mount designs.
• Low cost mass produced oscillator.
• Tape and Reel or cut tape packaging is available.
• 106.25 MHz or 212.50 MHz may be selected
thru
Pad 2 (see page 6)
• 5 x 7 mm LCC Ceramic Package
• Enable/Disable Function on pad 1
• V
CC
of 3.3 volts
• Low Jitter
LV88D Dual Frequency
LVDS Clock Oscillators
April 2010
Part Number:
LV88
45
D
E
V
-106 / 212M
-XX
Packaging code or blank
T250
= 250 per Tape and Reel
T500
= 500 per Tape and Reel
T1K
= 1000 per Tape and Reel
Part Marking:
PLE LV88
106/212M
C
YMDXX
or
bs
o
Series Model
Codes for Date Code YMD
Code
Marking Legend:
PLE = Pletronics
YYWW or YWW or
YMD
= Date of Manufacture (year and week, or year-month-day)
All other marking is internal factory codes
Specifications such as frequency stability, supply voltage and operating temperature range, etc. are
not identified from the marking. External packaging labels and packing list will correctly identify the
ordered Pletronics part number.
O
Code
Day
Code
Day
1
1
H
17
0
1
2
3
4
Code
Year
2010 2011 2012 2013 2014
Month
JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC
2
2
J
18
3
3
K
19
4
4
L
20
www.pletronics.com
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Frequency in MHz
106.25 or 212.50 MHz are user
switchable via Pad 2
Supply Voltage V
CC
V
= 3.3V _ 10%
+
LV8XYWWXX
106/212 M
C
PLE XXX
Optional Enhanced OTR
Blank
= Temp. range -10 to +70
o
C
C
= Temp. range -20 to +70
o
C
E
= Temp. range -40 to +85
o
C
Series Model
Frequency Stability
45
= + 50 ppm
_
44
= + 25 ppm
_
20
= + 20 ppm
_
A
B
C
D
E
F
G
H
J
K
L
M
5
5
M
21
6
6
N
22
7
7
P
23
8
8
R
24
9
9
T
25
A
10
U
26
B
11
V
27
C
12
W
28
D
13
X
29
E
14
Y
30
F
15
Z
31
G
16
425-776-1880
2
LV88D Dual Frequency
LVDS Clock Oscillators
April 2010
Electrical Specification for 3.30V _10% over the specified temperature range
+
Item
Frequency Range
Frequency Accuracy “45"
“44"
“20"
Output Waveform
Output High Level
Output Low Level
Differential Output (V
OD
)
Output Offset Voltage (V
OS
)
Differential Output Error (dV
OS
)
Output Symmetry
Output T
RISE
and T
FALL
Min
106.25
-50
-25
-20
Max
212.50
+50
+25
+20
Unit
MHz
ppm
For all supply voltages, load changes, aging
for 1 year, shock, vibration and temperatures
Condition
O
Start up time
bs
o
Jitter
-
0.8
pS RMS
-
1.5
12
68
Output Current
mA
Vcc Supply Current
-
mA
V disable / Frequency Select Low
-
0.8
-
Volts
V enable / Frequency Select High
Input High Current
Input Low Current
Enable
2.0
Volts
uA
-10
+10
-50
-
+10
10
uA
nS
Disable time
-
10
5
+70
+70
+85
+125
nS
-
-10
-20
-40
-55
mS
o
Operating Temperature Range
Storage Temperature Range
Specifications with Pad 1 E/D open circuit unless otherwise stated
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LVDS
--
1.47
--
Volts
See load circuit
R1 = 50 ohms
0.93
200
Volts
400
mVolts
Volts
1.125
--
1.275
25
mVolts
%
48
52
Referenced to 50% of amplitude or crossing
point
Vth is 20% and 80% of waveform
200
600
pS
Measured 12KHz to 20MHz from Fnominal
Measured 10Hz to 1MHz from Fnominal
Outputs shorted together
Includes current of terminated device
Outputs held in a fixed state
Pad 1 or Pad 2 at V
CC
Pad 1 or Pad 2 at 0 Volts
Time for output to reach a logic state
Time for output to reach a high Z state
Measured from the time Vcc = 3.0V
Standard Temperature Range
Extended Temperature Range
Extended Temperature Range
“C” Option
“E” Option
C
C
C
C
o
o
o
425-776-1880
3
LV88D Dual Frequency
LVDS Clock Oscillators
April 2010
Typical Phase-Noise Response
0
-20
-40
dBc/Hz
-60
-100
-120
-140
-160
10
bs
o
Test Waveform
Symmetry
O
Vhigh
80%
50%
20%
Vlow
Trise
Tfall
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1,000
100,000
10,000,000
-80
Frequency (Hz)
Load Circuit
Out
Out*
Showing Out Measurement only
425-776-1880
4
LV88D Dual Frequency
LVDS Clock Oscillators
April 2010
Reliability
: Environmental Compliance
Parameter
Mechanical Shock
Vibration
Solderability
Thermal Shock
Condition
MIL-STD-883 Method 2002, Condition B
MIL-STD-883 Method 2007, Condition A
MIL-STD-883 Method 2003
MIL-STD-883 Method 1011, Condition A
ESD Rating
Model
Human Body Model
Charged Device Model
Minimum Voltage
1500
1000
O
www.pletronics.com
425-776-1880
bs
o
Package Labeling
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Courier New
Bar code is 39-Full ASCII
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Conditions
MIL-STD-883 Method 3115
JESD 22-C101
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Arial
5
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