NDF04N60Z, NDD04N60Z
N-Channel Power MOSFET
600 V, 2.0
W
Features
•
•
•
•
•
Low ON Resistance
Low Gate Charge
ESD Diode−Protected Gate
100% Avalanche Tested
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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V
DSS
(@ T
Jmax
)
650 V
R
DS(on)
(MAX) @ 2 A
2.0
Ω
ABSOLUTE MAXIMUM RATINGS
(T
C
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Continuous Drain Current R
qJC
(Note 1)
Continuous Drain Current R
qJC
, T
A
=
100°C (Note 1)
Pulsed Drain Current,
V
GS
@ 10V
Power Dissipation R
qJC
Gate−to−Source Voltage
Single Pulse Avalanche Energy, I
D
= 4.0
A
ESD (HBM) (JESD22−A114)
RMS Isolation Voltage
(t = 0.3 sec., R.H.
≤
30%, T
A
= 25°C)
(Figure 15)
Peak Diode Recovery (Note 2)
MOSFET dV/dt
Continuous Source Current
(Body Diode)
Maximum Temperature for Soldering
Leads
Operating Junction and
Storage Temperature Range
Symbol
V
DSS
I
D
I
D
I
DM
P
D
V
GS
E
AS
V
esd
V
ISO
4.8
3.0
20
30
±30
120
3000
4500
−
NDF
NDD
600
4.1
2.6
20
83
Unit
V
A
A
A
W
V
mJ
V
V
G (1)
N−Channel
D (2)
S (3)
dV/dt
dV/dt
I
S
T
L
T
J
, T
stg
4.5
60
4.0
260
−55
to 150
V/ns
V/ns
A
°C
°C
1
2
3
NDF04N60ZG,
NDF04N60ZH
TO−220FP
CASE 221AH
4
4
1
1 2
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Limited by maximum junction temperature
2. I
SD
= 4.0 A, di/dt
≤
100 A/ms, V
DD
≤
BV
DSS
, T
J
= +150°C
3
NDD04N60Z−1G
IPAK
CASE 369D
2
3
NDD04N60ZT4G
DPAK
CASE 369AA
ORDERING AND MARKING INFORMATION
See detailed ordering, marking and shipping information on
page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 2015
May, 2017
−
Rev. 10
1
Publication Order Number:
NDF04N60Z/D
NDF04N60Z, NDD04N60Z
THERMAL RESISTANCE
Parameter
Junction−to−Case (Drain)
Junction−to−Ambient Steady State
NDF04N60Z
NDD04N60Z
(Note 3) NDF04N60Z
(Note 4) NDD04N60Z
(Note 3) NDD04N60Z−1
Symbol
R
qJC
R
qJA
Value
4.2
1.5
50
38
80
Unit
°C/W
3. Insertion mounted
4. Surface mounted on FR4 board using 1″ sq. pad size (Cu area = 1.127 in sq [2 oz] including traces).
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Breakdown Voltage Temperature Co-
efficient
Drain−to−Source Leakage Current
V
GS
= 0 V, I
D
= 1 mA
Reference to 25°C,
I
D
= 1 mA
V
DS
= 600 V, V
GS
= 0 V
V
GS
=
±20
V
V
GS
= 10 V, I
D
= 2.0 A
V
DS
= V
GS
, I
D
= 50
mA
V
DS
= 15 V, I
D
= 2.0 A
25°C
150°C
I
GSS
R
DS(on)
V
GS(th)
g
FS
C
iss
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
C
oss
C
rss
Q
g
V
DD
= 300 V, I
D
= 4.0 A,
V
GS
= 10 V
Q
gs
Q
gd
V
GP
R
g
t
d(on)
V
DD
= 300 V, I
D
= 4.0 A,
V
GS
= 10 V, R
G
= 5
Ω
t
r
t
d(off)
t
f
427
50
8
10
2
5
3.0
1.8
3.9
3.3
535
62
14
19
3.9
10
6.5
4.7
13
9.0
24
15
640
75
20
29
6
15
nC
V
W
ns
nC
BV
DSS
DBV
DSS
/
DT
J
I
DSS
600
0.6
1
50
±10
2.0
4.5
mA
W
V
S
pF
V
V/°C
mA
Test Conditions
Symbol
Min
Typ
Max
Unit
Gate−to−Source Forward Leakage
ON CHARACTERISTICS
(Note 5)
Static Drain−to−Source
On−Resistance
Gate Threshold Voltage
Forward Transconductance
DYNAMIC CHARACTERISTICS
Input Capacitance (Note 6)
Output Capacitance (Note 6)
Reverse Transfer Capacitance
(Note 6)
Total Gate Charge (Note 6)
Gate−to−Source Charge (Note 6)
Gate−to−Drain (“Miller”) Charge
Plateau Voltage
Gate Resistance
RESISTIVE SWITCHING CHARACTERISTICS
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
SOURCE−DRAIN DIODE CHARACTERISTICS
(T
C
= 25°C unless otherwise noted)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
I
S
= 4.0 A, V
GS
= 0 V
V
GS
= 0 V, V
DD
= 30 V
I
S
= 4.0 A, di/dt = 100 A/ms
V
SD
t
rr
Q
rr
285
1.3
1.6
V
ns
mC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse Width
≤
380
ms,
Duty Cycle
≤
2%.
6. Guaranteed by design.
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2
NDF04N60Z, NDD04N60Z
TYPICAL CHARACTERISTICS
8
T
J
= 25°C
I
D
, DRAIN CURRENT (A)
6
8
10 V
7V
6.8 V
6.6 V
4
6.4 V
6.2 V
2
6.0 V
5.8 V
0
5.6 V
0
5
10
15
20
25
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
0
T
J
=
−55°C
3
4
5
6
7
8
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
V
DS
≥
30 V
I
D
, DRAIN CURRENT (A)
6
V
GS
= 15 V
4
T
J
= 150°C
2
T
J
= 25°C
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
3.5
3
2.5
2
1.5
1
I
D
= 2 A
T
J
= 25°C
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
3
Figure 2. Transfer Characteristics
T
J
= 25°C
2.5
2
V
GS
= 10 V
1.5
5
6
7
V
GS
(V)
8
9
10
1
0.5
1
1.5
2
2.5
3
3.5
4
I
D
, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate Voltage
2.6
R
DS(on)
, DRAIN−TO−SOURCE RES-
ISTANCE (NORMALIZED)
I
D
= 2 A
V
GS
= 10 V
I
DSS
, LEAKAGE (nA)
2
1000
10,000
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
V
GS
= 0 V
T
J
= 150°C
1.4
100
T
J
= 100°C
0.8
0.2
−50
−25
0
25
50
75
100
125
150
10
0
100
200
300
400
500
600
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NDF04N60Z, NDD04N60Z
TYPICAL CHARACTERISTICS
1200
1000
C, CAPACITANCE (pF)
800
600
400
C
oss
200
0
C
rss
0
50
100
150
C
iss
V
GS
= 0 V
T
J
= 25°C
f = 1.0 MHz
20
400
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
15
V
DS
QT
300
10
Qgs
5
T
J
= 25°C
I
D
= 4 A
0
5
10
15
Qgd
V
GS
200
100
200
0
0
20
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
100
V
DD
= 300 V
I
D
= 4 A
V
GS
= 10 V
t, TIME (ns)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
t
d(off)
I
S
, SOURCE CURRENT (A)
t
r
t
f
t
d(on)
4
V
GS
= 0 V
T
J
= 25°C
3
10
2
1
1
1
10
R
G
, GATE RESISTANCE (W)
100
0
0.4
0.5
0.6
0.7
0.8
0.9
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
100
V
GS
≤
30 V
Single Pulse
T
C
= 25°C
100
ms
1 ms
10 ms
dc
10
ms
I
D
, DRAIN CURRENT (A)
10
100
Figure 10. Diode Forward Voltage vs. Current
I
D
, DRAIN CURRENT (A)
10
1 ms
10 ms
dc
V
GS
≤
30 V
Single Pulse
T
C
= 25°C
R
DS(on)
Limit
Thermal Limit
Package Limit
1
10
100
ms
10
ms
1
1
0.1
0.01
0.1
R
DS(on)
Limit
Thermal Limit
Package Limit
1
10
100
1000
0.1
0.01
100
1000
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area for NDF04N60Z
Figure 12. Maximum Rated Forward Biased
Safe Operating Area for NDD04N60Z
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4
NDF04N60Z, NDD04N60Z
TYPICAL CHARACTERISTICS
10
50% (DUTY CYCLE)
R(t) (C/W)
1.0
20%
10%
5.0%
0.1
2.0%
1.0%
SINGLE PULSE
0.01
0.000001
0.00001
0.0001
0.001
0.01
PULSE TIME (s)
0.1
1.0
10
100
1000
R
qJC
= 4.2°C/W
Steady State
Figure 13. Thermal Impedance for NDF04N60Z
10
1.0
R(t) (C/W)
50% (DUTY CYCLE)
20%
10%
5.0%
2.0%
1.0%
0.1
0.01
SINGLE PULSE
R
qJC
= 1.5°C/W
Steady State
0.001
0.000001
0.00001
0.0001
0.001
0.01
PULSE TIME (s)
0.1
1.0
10
100
1000
Figure 14. Thermal Impedance for NDD04N60Z
LEADS
HEATSINK
0.110″ MIN
Figure 15. Mounting Position for Isolation Test
Measurement made between leads and heatsink with all leads shorted together.
*For additional mounting information, please download the ON Semiconductor
Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
5
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