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Chopper Stabilized Amplifier Stage
Optimized for BDC Motor Applications
New Miniature Package/Thin, High Reliability Package
#
Operation Down to 3.5V
CMOS for Optimum Stability, Quality and Cost
#
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Solid State Switch
Brushless DC Motor Commutation
Speed Sensing
Linear Position Sensing
Angular Position Sensing
Current Sensing
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Part No.
US1881
US1881
US1881
US1881
US1881
MLX1881
Temperature Suffix
C
S
E
K
L
L
Package
SO or UA
SO or UA
SO or UA
SO or UA
SO or UA
SO or UA
Temperature Range
0
o
C to 70
o
C Commercial
-20
o
C to 85
o
C Industrial
-40
o
C to 85
o
C Extended
-40
o
C to 125
o
C Severe
-40
o
C to 150
o
C Full Temp.
-40
o
C to 150
o
C Automotive
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The US1881 is the industry’s first Hall integrated circuit
in a SOT-23 package. The above table of part numbers
provide six selections of Hall effect device (HED) sen-
sor ICs, in two package styles, based on guaranteed tem-
perature specifications.
The temperature ranges are defined by room temperature
(25°C) test guardbands and are not 100% tested at either
temperature extreme. Special testing is available as in
the case of the MLX series. Contact the Melexis market-
ing office with any questions. Though there are many
other applications for this HED, the design, specifica-
tions and performance have been optimized for commu-
tation applications in 5V and 12V brushless DC motors.
The output transistor will be “latched on” (B
OP
) in the
presence of a sufficiently strong South pole magnetic
field facing the marked side of the package. Similarly,
the output will be “latched off” (B
RP
) in the presence of
a North field.
The SOT-23 device is reversed from the UA package.
The SOT-23 output transistor will be “latched on” (B
OP
)
in the presence of a sufficiently strong North pole mag-
netic field subjected to the marked face.
V
DD
Output
Voltage
Regulator
Chopper
GND
UA Package
Pin 1 - V
D D
Pin 2 - GND
Pin 3 - Output
SO Package
Pin 1 - V
D D
Pin 2 - Output
Pin 3 - GND
Note:
Static sensitive device, please observe ESD precautions. Re-
verse V
DD
protection is not included. For reverse voltage protection,
a 100
Ω
resistor in series with V
DD
is recommended.
US1881 CMOS Multi-Purpose Latch
Rev 4.3
08/Nov/99
Page 1
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Parameter
Supply Voltage
Supply Current
Saturation Voltage
Output Leakage
Output Rise Time
Output Fall Time
DC Operating Parameters T
A
= 25
o
C, V
DD
= 12V (unless otherwise specified)
Symbol Test Conditions
V
DD
I
DD
V
DS(on)
I
OFF
t
r
t
f
Operating
B<B
OP
I
OUT
= 20 mA, B>B
OP
B<B
RP
, V
OUT
= 20V
V
DD
= 12V, R
L
= 1.1KΩ, C
L
= 20pf
V
DD
= 12V, R
L
= 1.1KΩ, C
L
= 20pf
Min
3.5
1.5
Typ
2.5
0.4
0.01
0.04
0.18
Max
20
4.0
0.5
5.0
Units
V
mA
V
µA
µs
µs
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Parameter
Operating Point
Release Point
Hysteresis
Symbol Test Conditions
B
OP
B
RP
B
hys
Min
1.0
-9.0
7.0
Typ
5.0
-5.0
10.0
Max
9.0
-1.0
12.0
Units
mT
mT
mT
1RWHV=##
1mT=10Gauss
The SOT-23 device is reversed from the UA package. The SOT-23 output transistor will be “latched
on” (B
OP
) in the presence of a sufficiently strong North pole magnetic field subjected to the marked face.
Melexis Inc. reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Melexis does
not assume any liability arising from the use of any product or application of any product or circuit described herein.
US1881 CMOS Multi-Purpose Latch
Rev 4.3
08/Nov/99
Page 2
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Typical Magnetic Switch Points
versus
Supply Voltage
12.5
Typical Magnetic Switch Points
versus
Temperature
12
B
HYS
1881
1881
7.5
B
OP
7.5
Flux Density (mT)
Flux Density (mT)
B
OP
2.5
2.5
-2.5
-2.5
B
RP
-7.5
-7.5
B
RP
-12.5
0
5
10
15
20
25
30
-12.5
-40
0
40
80
120
160
200
Supply Voltage (V)
Temperature (
o
C)
Min/Max Magnetic Switch
Range
versus
Temperature
12.5
Output Voltage
versus
Flux Density
30
1881
1881
B
OP
M a x
7.5
24
V
DD
Flux Density (mT)
Output Voltage (V)
2.5
B
OP
M i n
18
B
OP
12
-2.5
B
RP
M i n
B
RP
6
V
out
0
-7.5
B
RP
M a x
-12.5
-40
0
40
80
120
160
200
-30
-20
-10
0
10
20
30
Temperature (
o
C)
Flux Density (mT)
US1881 CMOS Multi-Purpose Latch
Rev 4.3
08/Nov/99
Page 3
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Typical Supply Current
versus
Supply Voltage
5
Typical Saturation Voltage
versus
Temperature
V
DD
= 12 V, I
OUT
= 20mA
1881
500
1881
4
400
T
A
= -40
o
C
Supply Current (mA)
3
T
A
= 25 C
o
V
DS(ON)
(mV)
300
2
200
V
DS(ON)
T
A
= 125
o
C
1
100
0
0
5
10
15
20
25
30
0
-40
0
40
80
120
160
200
Supply Voltage (V)
Temperature (
o
C)
Power Dissipation
versus
Temperature
500
Wave Soldering
Parameters
All Devices
280
All Devices
Package Power Dissipation (mW)
400
UA Package
R
θJA
=206
o
C / W
300
260
Solder Temperature (
o
C)
200
240
200
220
100
SO Package
R
θJA
=575
o
C / W
0
-40
0
40
80
120
o
200
160
0
5
10
15
20
25
30
Temperature ( C)
Time in Wave Solder (Seconds)
Rev 4.3
08/Nov/99
Page 4
US1881 CMOS Multi-Purpose Latch
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The Chopper Stabilized Amplifier, using switched
capacitor techniques, eliminates the amplifier offset
voltage, which in bipolar devices is a major source of
temperature sensitive drift. CMOS makes this ad-
vanced technique possible.
The CMOS chip is also much smaller than the Bipolar
chip, allowing very sophisticated circuitry to be placed
in less space. The small chip size also contributes to
lower physical stress and less power consumption.
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Observe ESD control procedures.
,QVWDOODWLRQ#&RPPHQWV#
Consider Temperature Coefficients of Hall IC and
magnetics, as well as air gap and life time variations.
Observe temperature limits during wave soldering.
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Highly advanced CMOS technology results in a Hall
IC small enough to fit inside of a SOT package. Due
to its extraordinary small size, the US1881SO series
has no equivalent.
The US1881UA series can replace the following:
Allegro & Sprague - UGN3175/77UA,
UGN3075/77UA, A3132/33/34UA
ITT - HAL105, HAL115, HAL125
Honeywell - SS41, SS400 series
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If reverse supply protection is desired, use a resistor in
series with the V
DD
pin that will limit the Supply Cur-
rent(Fault), I
DD
, to 50 mA. For severe EMC conditions
use the application circuit on the following page.
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Supply Voltage (Operating), V
DD
Supply Current (Fault), I
DD
Output Voltage, V
OUT
Output Current (Fault), I
OUT
Power Dissipation, P
D
Operating Temperature Range, T
A
Storage Temperature Range, T
S
Maximum Junction Temp, T
J
ESD Sensitivity (All Pins)
US1881 CMOS Multi-Purpose Latch
Rev 4.3
08/Nov/99
3.5V to 20V
50mA
3.5V to 20V
50mA
100mW
-40°C to 150°C
-65°C to 150°C
175°C
+/- 4KV
Page 5
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