IDT74FCT3827A/B
3.3V CMOS 10-BIT BUFFER
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
10-BIT BUFFER
IDT74FCT3827A/B
FEATURES:
−
−
−
−
−
−
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
V
CC
= 3.3V ±0.3V, Normal Range
V
CC
= 2.7V to 3.6V, Extended Range
CMOS power levels (0.4µ W typ. static)
Rail-to-Rail output swing for increased noise margin
DESCRIPTION:
The FCT3827A/B 10-bit bus drivers are built using an advanced dual
metal CMOS technology. These high speed, low power buffers are ideal
for high-performance bus interface buffering for wide data/address paths or
buses carrying parity. The 10-bit buffers have NAND-ed output enables
for maximum control flexibility.
All of the FCT3827 high performance interface components are de-
signed for high-capacitance load drive capability, while providing low-
capacitance bus loading at both inputs and outputs.
FUNCTIONAL BLOCK DIAGRAM
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
Y
9
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
OE
1
OE
2
INDUSTRIAL TEMPERATURE RANGE
1
c
2000 Integrated Device Technology, Inc.
NOVEMBER 2000
DSC-3092/4
IDT74FCT3827A/B
3.3V CMOS 10-BIT BUFFER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
OE
1
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
GN D
1
2
3
4
5
24
23
22
21
20
V
CC
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
Y
9
OE
2
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
V
TERM(3)
V
TERM(4)
T
STG
I
OUT
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +4.6
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +60
Unit
V
V
V
°C
mA
3V-8-link
SO24-2
19
6
SO24-8
18
7
17
8
9
10
11
12
16
15
14
13
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. Input terminals.
4. Outputs and I/O terminals.
SOIC/ QSOP
TOP VIEW
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
3.5
4
Max.
6
8
Unit
pF
pF
3V-8-link
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
Names
OE
I
D
I
Y
I
I/O
I
I
O
Description
When both are LOW the outputs are enabled. When
either one or both are HIGH the outputs are High Z.
10-bit data input.
10-bit data output.
(1)
FUNCTION TABLE
Inputs
OE
1
L
L
H
X
OE
2
L
L
X
H
D
I
L
H
X
X
Outputs
Y
I
L
H
Z
Z
Function
Transparent
Three-State
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High-Impedance
2
IDT74FCT3827A/B
3.3V CMOS 10-BIT BUFFER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= -40°C to +85°C, V
CC
= 2.7V to 3.6V
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
ODH
I
ODL
V
OH
Parameter
Input HIGH Level (Input pins)
Input HIGH Level (I/O pins)
Input LOW Level
(Input and I/O pins)
Input HIGH Current (Input pins)
Input HIGH Current (I/O pins)
Input LOW Current (Input pins)
Input LOW Current (I/O pins)
High Impedance Output Current
(3-State Output pins)
Clamp Diode Voltage
Output HIGH Current
Output LOW Current
Output HIGH Voltage
V
CC
= Min., I
IN
= –18mA
V
CC
= 3.3V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
(3)
V
CC
= 3.3V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
(3)
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 3V
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 3V
V
IN
= V
IH
or V
IL
I
OS
V
H
I
CCL
I
CCH
I
CCZ
Short Circuit Current
(4)
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max.
V
IN
= GND or V
CC
V
CC
= Max., V
O
= GND
(3)
—
–60
—
—
–135
150
0.1
–240
—
10
mA
mV
µA
I
OL
= 0.1mA
I
OL
= 16mA
I
OL
= 24mA
I
OL
= 24mA
—
—
—
—
0.2
0.3
0.3
0.2
0.4
0.55
0.5
V
I
OH
= –0.1mA
I
OH
= –3mA
I
OH
= –8mA
V
CC
= Max.
V
CC
= Max.
V
I
= 5.5V
V
I
= V
CC
V
I
= GND
V
I
= GND
V
O
= V
CC
V
O
= GND
—
—
—
—
—
—
—
–36
50
V
CC
–0.2
2.4
2.4
(5)
—
—
—
—
—
—
–0.7
–60
90
—
3
3
±1
±1
±1
±1
±1
±1
–1.2
–110
200
—
—
—
V
mA
mA
V
µA
µA
Guaranteed Logic LOW Level
Test Conditions
(1)
Guaranteed Logic HIGH Level
Min.
2
2
–0.5
Typ.
(2)
—
—
—
Max.
5.5
Vcc+0.5
0.8
V
Unit
V
3V-8-link
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH
= Vcc -0.6V at rated current.
3
IDT74FCT3827A/B
3.3V CMOS 10-BIT BUFFER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Dynamic Power Supply Current
(4)
V
CC
= Max.
V
CC
= Max.
Outputs Open
OE
1
=
OE
2
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi = 10MHz
50% Duty Cycle
OE
1
=
OE
2
= GND
One Bit Toggling
V
CC
= Max.
Outputs Open
fi = 2.5MHz
50% Duty Cycle
OE
1
=
OE
2
= GND
Ten Bits Toggling
Test Conditions
(1)
V
IN
= V
CC
–0.6V
(3)
V
IN
= V
CC
V
IN
= GND
Min.
—
—
Typ.
(2)
2
60
Max.
30
85
Unit
µA
µ A/
MHz
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
–0.6V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= V
CC
–0.6V
V
IN
= GND
—
0.6
0.9
mA
—
0.6
0.9
—
1.5
2.1
(5)
—
1.5
2.3
(5)
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3. Per TTL driven input; all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + fiNi)
I
CC
= Quiescent Current (I
CCL,
I
CCH
and I
CCZ
)
∆I
CC
= Power Supply Current for a TTL High Input
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP
= Number of Clock Inputs at f
CP
f
i
= Input Frequency
N
i
= Number of Inputs at fi
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(3)
FCT3827A
Symbol
Parameter
t
PLH
Propagation Delay
t
PHL
D
I
to Y
I
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
C
L
= 300pF
(3)
R
L
= 500Ω
C
L
= 50pF
R
L
= 500Ω
C
L
= 300pF
(3)
R
L
= 500Ω
C
L
= 5pF
(3)
R
L
= 500Ω
C
L
= 50pF
R
L
= 500Ω
Min
.
(2)
1.5
1.5
1.5
1.5
1.5
1.5
Max
.
8
15
12
23
9
10
Min
.
(2)
1.5
1.5
1.5
1.5
1.5
1.5
FCT3827B
Max
.
5
13
8
15
6
7
ns
ns
Unit
ns
t
PZH
t
PZL
Output Enable Time
OE
I
to Y
I
t
PHZ
t
PLZ
Output Disable Time
OE
I
to Y
I
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Propagation Delays and Enable/Disable times are with V
CC
= 3.3V ±0.3V, Normal Range. For V
CC
= 2.7V to 3.6V, Extended Range, all Propagation Delays
and Enable/Disable times should be degraded by 20%.
4
IDT74FCT3827A/B
3.3V CMOS 10-BIT BUFFER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
6v
V
CC
500
Ω
V
IN
Pulse
Generator
R
T
D.U.T.
50pF
C
L
500
Ω
V
OUT
Open
GND
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other Tests
Open
3V-8-link
Switch
6V
GND
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
SET-UP, HOLD, AND RELEASE TIMES
DATA
INPUT
t
SU
TIMING
INPUT
ASYNCHRONOUS C ONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
REM
t
H
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
PULSE WIDTH
LOW -HIGH-LOW
PULSE
t
W
HIGH-LOW -HIGH
PULSE
1.5V
1.5V
t
SU
t
H
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
CONTROL
INPUT
3V
1.5V
0V
V
OH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
1.5V
V
OL
3V
1.5V
0V
OUTPUT
NORMALLY
HIGH
t
PZL
OUTPUT
NORMALLY
LOW
SW ITCH
6V
t
PZH
SW ITCH
GND
3V
1.5V
0.3V
t
PHZ
0.3V
1.5V
0V
0V
V
OH
t
PLZ
1.5V
0V
3V
V
OL
PROPAGATION DELAY
SAM E PHASE
INPUT TRANSITION
t
PLH
t
PHL
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns.
3. If Vcc is below 3V, input voltage swings should be adjusted not to
exceed Vcc.
5
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