EPSA23BBHL-25.000M
REGULATORY COMPLIANCE
2011/65 +
2015/863
(Data Sheet downloaded on Aug 27, 2020)
191 SVHC
ITEM DESCRIPTION
Spread Spectrum Quartz Crystal Clock Oscillators LVCMOS (CMOS) 3.3Vdc 4 Pad 3.2mm x 5.0mm Ceramic Surface Mount
(SMD) 25.000MHz ±50ppm Maximum -40°C to +85°C Tri-State -2.00% Down Spread
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
Operating Temperature Range
Supply Voltage
Maximum Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Output Control Function
Tri-State Input Voltage (Vih and Vil)
Tri-State Output Enable Time
Tri-State Output Disable Time
Disable Current
Spread Spectrum
Modulation Frequency
Period Jitter
Start Up Time
Storage Temperature Range
25.000MHz
±50ppm Maximum (Inclusive of all conditions: Frequency Stability over the Operating Temperature Range, Supply
Voltage Change, Output Load Change, First Year Aging at 25°C, Shock, and Vibration.)
-40°C to +85°C
3.3Vdc ±10%
-0.5Vdc to +4.2Vdc
15mA Maximum
90% of Vdd Minimum (IOH=-8mA)
10% of Vdd Maximum (IOL=+8mA)
3nSec Maximum (Measured at 10% to 90% of Waveform)
50 ±5(%) (Measured at 50% of waveform)
15pF Maximum
CMOS
Tri-State (Disabled Output: High Impedance)
70% of Vdd Minimum or No Connection to Enable Output, 30% of Vdd Maximum to Disable Output
100nSec Maximum
100nSec Maximum
20mA Maximum (Unloaded; Pad 1=Ground)
-2.00% Down Spread
30kHz Minimum, 32kHz Typical, 45kHz Maximum
100pSec Maximum (Cycle to Cycle; Spread Spectrum-On)
10mSec Maximum
-55°C to +125°C
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
ESD Susceptibility
Fine Leak Test
Flammability
Gross Leak Test
Mechanical Shock
Moisture Resistance
Moisture Sensitivity
Resistance to Soldering Heat
Resistance to Solvents
Solderability
Temperature Cycling
Vibration
MIL-STD-883, Method 3015, Class 1, HBM: 1500V
MIL-STD-883, Method 1014, Condition A
UL94-V0
MIL-STD-883, Method 1014, Condition C
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 1004
J-STD-020, MSL 1
MIL-STD-202, Method 210, Condition K
MIL-STD-202, Method 215
MIL-STD-883, Method 2003
MIL-STD-883, Method 1010, Condition B
MIL-STD-883, Method 2007, Condition A
www.ecliptek.com | Specification Subject to Change Without Notice | Revision D 02/27/2015 | Page 1 of 4
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
EPSA23BBHL-25.000M
Test Circuit for CMOS Output
Oscilloscope
Frequency
Counter
+
+
Power
Supply
_
+
Voltage
Meter
_
Current
Meter
_
Supply
Voltage
(V
DD
)
Probe
(Note 2)
Output
0.01µF
(Note 1)
0.1µF
(Note 1)
Ground
C
L
(Note 3)
Tri-State or
Power Down
Note 1: An external 0.01µF ceramic bypass capacitor in parallel with a 0.1µF high frequency ceramic bypass
capacitor close (less than 2mm) to the package ground and supply voltage pin is required.
Note 2: A low input capacitance (<12pF), 10X Attentuation Factor, High Impedance (>10Mohms), and
High bandwidth (>300MHz) passive probe is recommended.
Note 3: Capacitance value CL includes sum of all probe and fixture capacitance. See applicable specification sheet
for ‘Load Drive Capability’.
www.ecliptek.com | Specification Subject to Change Without Notice | Revision D 02/27/2015 | Page 4 of 4
Ecliptek, LLC
5458 Louie Lane, Reno, NV 89511
1-800-ECLIPTEK or 714.433.1200
嵌入式系统
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