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CY7C1041CV33
4-Mbit (256K x 16) Static RAM
Features
■
Functional Description
The CY7C1041CV33 is a high performance CMOS static RAM
organized as 262,144 words by 16 bits.
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from IO pins (IO
0
through IO
7
), is written into the location
specified on the address pins (A
0
through A
17
). If Byte High
Enable (BHE) is LOW, then data from IO pins (IO
8
through IO
15
)
is written into the location specified on the address pins (A
0
through A
17
).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on IO
0
to IO
7
. If
Byte High Enable (BHE) is LOW, then data from memory
appears on IO
8
to IO
15
. For more information, see the
Truth
Table
on page 9 for a complete description of Read and Write
modes.
The input and output pins (IO
0
through IO
15
) are placed in a high
impedance state when the device is deselected (CE HIGH), the
outputs are disabled (OE HIGH), the BHE and BLE are disabled
(BHE, BLE HIGH), or during a write operation (CE LOW and WE
LOW).
For best practice recommendations, refer to the Cypress
application note
AN1064, SRAM System Guidelines.
Temperature ranges
❐
Commercial: 0°C to 70°C
❐
Industrial: –40°C to 85°C
❐
Automotive-A: –40°C to 85°C
❐
Automotive-E: –40°C to 125°C
Pin and function compatible with CY7C1041BV33
High speed
❐
t
AA
= 10 ns (Commercial, Industrial and Automotive-A)
❐
t
AA
= 12 ns (Automotive-E)
Low active power
❐
324 mW (max)
2.0V data retention
Automatic power down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE and OE features
Available in Pb-free and non Pb-free 44-pin 400 Mil SOJ, 44-pin
TSOP II and 48-Ball FBGA packages
■
■
■
■
■
■
■
■
Logic Block Diagram
INPUT BUFFER
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
ROW DECODER
256K x 16
RAM Array
SENSE AMPS
IO
0
–IO
7
IO
8
–IO
15
COLUMN DECODER
BHE
WE
CE
OE
BLE
A
10
A
11
A
12
A
14
A
13
A
16
A
17
A
15
A
9
Cypress Semiconductor Corporation
Document Number: 38-05134 Rev. *I
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised February 14, 2008
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CY7C1041CV33
Selection Guide
Description
Maximum Access Time
Maximum Operating Current
Commercial
Industrial
Automotive-A
Automotive-E
Maximum CMOS Standby Current
Commercial/
Industrial
Automotive-A
Automotive-E
10
10
15
-10
10
90
100
100
120
10
10
-12
12
85
95
-15
15
80
90
-20
20
75
85
85
90
10
10
15
Unit
ns
mA
mA
mA
mA
mA
mA
mA
Pin Configuration
Figure 1. 44-Pin SOJ/TSOP II (Top View)
[1]
Figure 2. 48-Ball FBGA Pinout (Top View)
[1]
A
0
A
1
A
2
A
3
A
4
CE
IO
0
IO
1
IO
2
IO
3
V
CC
V
SS
IO
4
IO
5
IO
6
IO
7
WE
A
5
A
6
A
7
A
8
A
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A
17
A
16
A
15
OE
BHE
BLE
IO
15
IO
14
IO
13
IO
12
V
SS
V
CC
IO
11
IO
10
IO
9
IO
8
NC
A
14
A
13
A
12
A
11
A
10
1
BLE
IO
0
IO
1
V
SS
V
CC
IO
6
IO
7
NC
2
OE
BHE
IO
2
IO
3
IO
4
IO
5
NC
A
8
3
A
0
A
3
A
5
A
17
NC
A
14
A
12
A
9
4
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
5
A
2
CE
IO
10
6
NC
IO
8
IO
9
A
B
C
D
E
F
G
H
IO
11
V
CC
IO
12
IO
13
WE
A
11
V
SS
IO
14
IO
15
NC
Note
1. NC pins are not connected on the die.
Document Number: 38-05134 Rev. *I
Page 2 of 14
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CY7C1041CV33
Pin Definitions
Pin Name
A
0
–A
17
SOJ, TSOP
Pin Number
1–5, 18–27,
42–44
BGA
Pin Number
A3, A4, A5, B3,
B4, C3, C4,
D4, H2, H3, H4,
H5, G3, G4, F3,
F4, E4, D3
IO Type
Input
Description
Address Inputs.
Used to select one of the address locations.
IO
0
–IO
15
7–10,13–16, B1, C1, C2, D2, Input or Output
Bidirectional Data IO lines.
Used as input or output lines depending
29–32, 35–38 E2, F2, F1, G1,
on operation.
B6, C6, C5, D5,
E5, F5, F6, G6
28
17
6
40, 39
41
A6, E3, G2, H1,
H6
G5
B5
B2, A1
A2
No Connect
Input or
Control
Input or
Control
Input or
Control
Input or
Control
No Connects.
Not connected to the die.
Write Enable Input, Active LOW.
When selected LOW, a write is
conducted. When deselected HIGH, a read is conducted.
Chip Enable Input, Active LOW.
When LOW, selects the chip.
When HIGH, deselects the chip.
Byte Write Select Inputs, Active LOW.
BHE controls IO
16
– IO
9
,
BLE controls IO
8
– IO
1
.
Output Enable, Active LOW.
Controls the direction of the IO pins.
When LOW, the IO pins are allowed to behave as outputs. When
deasserted HIGH, the IO pins are tri-stated and act as input data
pins.
Ground for the Device.
Connected to ground of the system.
NC
WE
CE
BHE, BLE
OE
V
SS
V
CC
12, 34
11, 33
D1, E6
D6, E1
Ground
Power Supply
Power Supply Inputs to the Device.
Document Number: 38-05134 Rev. *I
Page 3 of 14
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CY7C1041CV33
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied ............................................ –55°C to +125°C
Supply Voltage on V
CC
Relative to GND
[2]
.....–0.5V to +4.6V
DC Voltage Applied to Outputs
in High Z State
[2]
...................................... –0.5V to V
CC
+0.5V
DC Input Voltage
[2]
Static Discharge Voltage............................................ >2001V
(MIL-STD-883, Method 3015)
Latch Up Current ..................................................... >200 mA
Operating Range
Range
Commercial
Industrial
Automotive-A
Automotive -E
Ambient
Temperature (T
A
)
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +125°C
V
CC
3.3V
±
10%
.................................. –0.5V to V
CC
+0.5V
Current into Outputs (LOW)......................................... 20 mA
Electrical Characteristics
Over the Operating Range
Parameter
V
OH
V
OL
V
IH
V
IL [2]
I
IX
Description
Test Conditions
-10
Min
2.4
0.4
2.0
–0.3
GND < V
I
< V
CC
Com’l/Ind’l
Auto-A
Auto-E
I
OZ
Output Leakage
Current
GND < V
OUT
< V
CC
, Com’l/Ind’l
Output disabled
Auto-A
Auto-E
I
CC
V
CC
Operating
Supply Current
V
CC
= Max,
f = f
MAX
= 1/t
RC
Com’l
Ind’l
Auto-A
Auto-E
I
SB1
Automatic CE Power Max V
CC
,
Down Current —TTL CE > V
IH
V
IN
> V
IH
or
Inputs
V
IN
< V
IL
, f = f
MAX
Com’l/Ind’l
Auto-A
Auto-E
10
10
15
40
40
45
10
10
90
100
100
120
40
40
–1
–1
+1
+1
–20
+20
85
95
80
90
–1
–1
V
CC
+ 0.3
0.8
+1
+1
–20
–1
+20
+1
–1
+1
2.0
–0.3
–1
Max
2.4
0.4
V
CC
+ 0.3
0.8
+1
2.0
–0.3
–1
-12
Min
Max
2.4
0.4
V
CC
+ 0.3
0.8
+1
2.0
–0.3
–1
–1
–20
–1
–1
–20
-15
Min
Max
2.4
0.4
V
CC
+ 0.3
0.8
+1
+1
+20
+1
+1
+20
75
85
85
90
40
40
45
10
10
15
mA
mA
mA
μA
-20
Min
Max
Unit
V
V
V
V
μA
Output HIGH Voltage V
CC
= Min, I
OH
= –4.0 mA
Output LOW Voltage V
CC
= Min, I
OL
= 8.0 mA
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Current
I
SB2
Automatic CE Power Max V
CC
,
Com’l/Ind’l
Down Current —
CE > V
CC
– 0.3V, Auto-A
CMOS Inputs
V
IN
> V
CC
– 0.3V,
or V
IN
< 0.3V, f = 0 Auto-E
Note
2. V
IL
(min) = –2.0V and V
IH
(max) = V
CC
+ 0.5V for pulse durations of less than 20 ns.
Document Number: 38-05134 Rev. *I
Page 4 of 14
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