Clock and Data Recovery Products
CD-700
Description:
Vectron’s CD-700 is a user-configurable crystal based
PLL integrated circuit. It includes a digital phase
detector, op-amp, VCXO and additional integrated
functions for use in digital synchronization
applications
Performance Characteristics
Parameter
Output Frequency: (ordering option)
Out 1, 5V option
Out 1, 3.3V option
Supply Voltage1:
+5.0
+3.3
Supply Current:
Output Logic Levels:
Output Logic High
Output Logic Low
Output Transition Times:
Rise Time2
Fall Time2
Input Logic Levels:
Input Logic High2
Input Logic Low2
Nominal Frequency on Loss of Signal
Output 1
Output 2
Symmetry or Duty Cycle2
Out 1
Out 2
RCLK
Absolute Pull Range
(ordering option)
over operating temp, aging, p.s. variations
Test Conditions for APR (+5V option)
Test Conditions for APR (+3.3V option)
Transfer Function
Phase Detector Gain
+5.0V option
+3.3V option
Operating temperature (ordering option)
Control Voltage Leakage Current
I
VCXO
SYM1
SYM2
RCLK
APR
V
IH
V
OL
V
DD
Features:
·
5 x 7.5mm, smallest VCXO PLL available
·
Output Frequencies to 65.536 MHz
·
5 or 3.3 Vdc operation
·
Tri-state Output
·
Loss of Signal Alarm
·
VCXO with CMOS outputs
·
0/70 or -40/85°C temperature range
·
Hermetically sealed ceramic SMD package
Symbol
Min.
12.000
12.000
4.5
3.0
I
DD
V
OH
V
OL
tR
tF
2.0
0.5
±75
±75
40
45
40
±50, ±80, ±100
60
55
60
2.5
0.5
5
5
5.0
3.3
Typical
Max
65.536
51.840
5.5
3.3
63
Unit
MHz
MHz
V
V
mA
V
V
ns
ns
V
V
ppm
ppm
%
%
%
ppm
V
C
V
C
0.5
0.3
Positive
0.53
0.35
0/70 or -40/85
4.5
3.0
V
V
rad/V
rad/V
o
C
+1
uA
1. A 0.01 uF capacitor should be located as close to the supply as possible (to ground) and a 0.1 uF is also recommended.
2. Symmetry is defined as (ON TIME/PERIOD) with V
S
= 1.4V for both 5V and 3.3V operation.
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • Web: www.vectron.com
100
Clock and Data Recovery Products
CD-700
Outline Drawing
13 12 11 10 9
14
15
16
CLAFGAB
FREQUENCY
VI YWW
1 2 3 4 5
8
7
6
Pad Layout
Pin Out Information
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
OPOUT
OPN
PHO
LOSIN
DATAIN
CLKIN
GND
LOS
RCLK
RDATA
Output 2
HIZ
Output 1
V
DD
OPP
V
C
Function
Op-Amp Output
Op-Amp Negative Input
Phase detector output
Loss of signal input
Phase detector Input signal
Phase detector Clock signal
Cover and Electrical Ground
Loss of signal indicator
Recovered Clock
Recovered Data
Divided-down VCXO Output, or No Output
INPUT (This Tri-states the outputs)
VCXO Output
Power Supply Voltage
(3.3V ±10% or 5.0V ±10%)
Op-Amp Positive Input
VCXO Control Voltage
Standard Frequencies (MHz)
12.000
19.440
27.000
35.328
44.736
62.500
12.288
24.576
30.000
38.880
51.840
65.536
12.352
24.704
30.720
39.3216
54.000
16.000
24.960
32.768
40.000
60.000
16.384
25.000
34.368
40.960
62.208
CDR
Consult datasheet on website.
Ordering Information
CD
Product Family
CD
= Clock and Data
Package
700
= 16 pin SMD
Input
K
= 5.0 Vdc +10%
L
= 3.3 Vdc +10%
700
L
A
F
G
A
B
44.736
MHz
Frequency
12.000 MHz to
65.536 MHz
Duty Cycle
B
= 50/50 ±10% (Out 1)
Divide By
A
= 2
F
= 64
B
= 4
G
= 128
C
= 8
H
= 256
D
= 16
K
= Disable
E
= 32
Output
A
= CMOS
Temperature Range
C
= 0
o
C to +70
o
C
F
=
-40
o
C to +85
o
C
Absolute Pull Range
G
= +50 ppm
N
= +80 ppm
H
= +100 ppm
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • Web: www.vectron.com
101
嵌入式系统
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