Ordering number : ENA1622
LC87F2R04A
Overview
CMOS IC
4K-byte FROM and 128-byte RAM integrated
8-bit 1-chip Microcontroller
The SANYO LC87F2R04A is an 8-bit microcomputer that, centered around a CPU running at a minimum bus cycle time
of 83.3ns, integrates on a single chip a number of hardware features such as 4K-byte flash ROM, 128-byte RAM, an On-
chip-debugger, sophisticated 16-bit timers/counters (may be divided into 8-bit timers), two 8-bit timers with a prescaler,
an asynchronous/synchronous SIO interface, a 12-bit/8-bit 8-channel AD converter, an internal reset and a 12-source 8-
vector interrupt feature.
Features
Flash ROM
•
Capable of on-board programming with wide range (2.2 to 5.5V) of voltage source.
•
Block-erasable in 128 byte units
•
Writable in 2-byte units
•
4096
×
8 bits
RAM
•
128
×
9 bits
Minimum Bus Cycle
•
83.3ns (12MHz at VDD=2.7V to 5.5V)
•
100ns (10MHz at VDD=2.2V to 5.5V)
Note: The bus cycle time here refers to the ROM read speed.
* This product is licensed from Silicon Storage Technology, Inc. (USA), and manufactured and sold by
SANYO Semiconductor Co., Ltd.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer
'
s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
'
s products or
equipment.
Ver.0.61
D0909HKIM 20091112-S00004 No.A1622-1/24
LC87F2R04A
Minimum Instruction Cycle Time
•
250ns (12MHz at VDD=2.7V to 5.5V)
•
300ns (10MHz at VDD=2.2V to 5.5V)
Ports
•
Normal withstand voltage I/O ports
Ports whose I/O direction can be designated in 1-bit units 11(P1n, P20, P21, P70)
Ports whose I/O direction can be designated in 4-bit units 8 (P0n)
•
Dedicated oscillator ports/input ports
2 (CF1, CF2)
•
Reset pin
1 (RES)
•
Power pins
2 (VSS1, VDD1)
Timers
•
Timer 0: 16-bit timer/counter with a capture register.
Mode 0: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register)
×
2 channels
Mode 1: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register)
+ 8-bit counter (with an 8-bit capture register)
Mode 2: 16-bit timer with an 8-bit programmable prescaler (with a 16-bit capture register)
Mode 3: 16-bit counter (with a 16-bit capture register)
•
Timer 6: 8-bit timer with a 6-bit prescaler (with toggle outputs)
•
Timer 7: 8-bit timer with a 6-bit prescaler (with toggle outputs)
SIO
•
SIO1: 8-bit asynchronous/synchronous serial interface
Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clocks)
Mode 1: Asynchronous serial I/O (half-duplex, 8 data bits, 1 stop bit, 8 to 2048 tCYC baudrates)
Mode 2: Bus mode 1 (start bit, 8 data bits, 2 to 512 tCYC transfer clocks)
Mode 3: Bus mode 2 (start detect, 8 data bits, stop detect)
AD Converter: 12 bits/8 bits
×
8 channels
•
12/8 bits AD converter resolution selectable
Remote Control Receiver Circuit (sharing pins with P73, INT3, and T0IN)
•
Noise rejection function (noise filter time constant selectable from 1 tCYC/32 tCYC/128 tCYC)
Watchdog Timer
•
External RC watchdog timer
•
Interrupt and reset signals selectable
No.A1622-2/24
LC87F2R04A
Interrupts
•
12 sources, 8 vector addresses
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests of
the level equal to or lower than the current interrupt are not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector
address takes precedence.
No.
1
2
3
4
5
6
7
8
9
10
Vector Address
00003H
0000BH
00013H
0001BH
00023H
0002BH
00033H
0003BH
00043H
0004BH
Level
X or L
X or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
INT0
INT1
INT2/T0L/INT4
INT3
T0H
None
None
SIO1
ADC/T6/T7
Port 0
Interrupt Source
•
Priority levels X > H > L
•
Of interrupts of the same level, the one with the smallest vector address takes precedence.
Subroutine Stack Levels: 64levels (The stack is allocated in RAM.)
High-speed Multiplication/Division Instructions
•
16 bits
×
8 bits
(5 tCYC execution time)
•
24 bits
×
16 bits
(12 tCYC execution time)
•
16 bits
÷
8 bits
(8 tCYC execution time)
•
24 bits
÷
16 bits
(12 tCYC execution time)
Oscillation Circuits
•
Internal oscillation circuits
Medium-speed RC oscillation circuit:
Multifrequency RC oscillation circuit:
•
External oscillation circuits
Hi-speed CF oscillation circuit:
For system clock (1MHz)
For system clock (8MHz)
For system clock, with internal Rf
System Clock Divider Function
•
Can run on low current.
•
The minimum instruction cycle selectable from 300ns, 600ns, 1.2μs, 2.4μs, 4.8μs, 9.6μs, 19.2μs, 38.4μs, and
76.8μs (at a main clock rate of 10MHz).
Internal reset function
•
Power-on reset (POR) function
1) POR reset is generated only at power-on time.
2) The POR release level can be selected from 8 levels (1.67V, 1.97V, 2.07V, 2.37V, 2.57V, 2.87V, 3.86V, and
4.35V) through option configuration.
•
Low-voltage detection reset (LVD) function
1) LVD and POR functions are combined to generate resets when power is turned on and when power voltage falls
below a certain level.
2) The use/disuse of the LVD function and the low voltage threshold level (7 levels: 1.91V, 2.01V, 2.31V, 2.51V,
2.81V, 3.79V, 4.28V).
No.A1622-3/24
LC87F2R04A
Standby Function
•
HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
1) Oscillation is not halted automatically.
2) There are three ways of resetting the HALT mode.
(1) Setting the reset pin to the low level
(2) System resetting by watchdog timer or low-voltage detection
(3) Occurrence of an interrupt
•
HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The CF, RC and crystal oscillators automatically stop operation.
2) There are four ways of resetting the HOLD mode.
(1) Setting the reset pin to the lower level.
(2) System resetting by watchdog timer or low-voltage detection
(3) Having an interrupt source established at either INT0, INT1, INT2, INT4
* INT0 and INT1 HOLD mode reset is available only when level detection is set.
(4) Having an interrupt source established at port 0.
On-chip Debugger
•
Supports software debugging with the IC mounted on the target board.
•
Software break point setting for debugger.
•
Stepwise execution on debugger.
•
Real time RAM data monitoring function on debugger.
All the RAM data map can be monitored on screen when the program is running.
(The RAM & SFR data can be changed by screen patch when the program is running)
•
Two channels of on-chip debugger pins are available to be compatible with small pin count devices.
DBGP0 (P0), DBGP1 (P1)
Data Security Function (flash versions only)
•
Protects the program data stored in flash memory from unauthorized read or copy.
Note: This data security function does not necessarily provide absolute data security.
Package Form
•
MFP24S(300mil): Lead-/Halogen-free type
•
SSOP24(225mil): Lead-/Halogen-free type
Development Tools
•
On-chip debugger: TCB87 TypeB+LC87F2R04A
: TCB87 TypeC (3 wire version) +LC87F2R04A
Programming Boards
Package
MFP24S(300mil)
SSOP24(225mil)
Programming boards
W87F2GM
W87F2GS
No.A1622-4/24
LC87F2R04A
Flash ROM Programmer
Maker
Single
Flash Support Group, Inc.
(FSG)
Ganged
Model
AF9708
AF9709/AF9709B/AF9709C
(including Ando Electric Co., Ltd. models)
AF9723/AF9723B(Main unit)
(including Ando Electric Co., Ltd. models)
AF9833(Unit)
(including Ando Electric Co., Ltd. models)
Flash Support Group, Inc.
(FSG)
+
SANYO (Note 1)
Single/ganged
Sanyo
Onboard
single/ganged
Onboard
single/ganged
AF9101/AF9103(Main unit)
(FSG)
SIB87(Interface driver)
(SANYO)
SKK/SKK Type B
(SANYO FWS)
SKK-DBG Type B
(SANYO FWS)
Application version
1.05 or later
Chip data version
2.22 or later
LC87F2R04A
(Note 2)
-
-
-
-
-
Rev 03.11 or later
LC87F2L08A
Supported Version
Device
For information about AF-Series:
Flash Support Group, Inc.
TEL: +81-53-459-1050
E-mail: sales@j-fsg.co.jp
Note1: On-board-programmer from FSG (AF9101/AF9103) and serial interface driver from SANYO (SIB87) together
can give a PC-less, standalone on-board-programming capabilities.
Note2: It needs a special programming devices and applications depending on the use of programming environment.
Please ask FSG or SANYO for the information.
Package Dimensions
unit : mm (typ)
3112B
12.5
24
13
Package Dimensions
unit : mm (typ)
3287
6.5
24
13
5.4
7.6
4.4
0.63
6.4
1
1.0
(0.75)
0.35
12
0.15
1
0.5
(0.5)
1.7max
12
0.22
0.15
0.1
SANYO : MFP24S(300mil)
SANYO : SSOP24(225mil)
0.1
(1.3)
1.5max
(1.5)
0.5
No.A1622-5/24
嵌入式系统
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