SyncMOS Technologies Inc.
July 2002
SM5964
8 - Bit Micro-controller
64KB ISP flash & 1KB RAM embedded
Product List
SM5964C25, 25 MHz 64KB internal flash MCU
SM5964C40, 40 MHz 64KB internal flash MCU
Features
Working voltage: 4.5V through 5.5V
General 8052 family compatible
12 clocks per machine cycle
64K byte on chip flash memory with In-System
Programming (ISP) capability
1024 byte on chip data RAM
Three 16 bit Timers/Counters
One Watch Dog Timer
Four 8-bit I/O ports for PDIP package
Four 8-bit I/O ports + one 4-bit I/O ports
for PLCC or QFP package
Full duplex serial channel
Bit operation instruction
Industrial Level
8-bit Unsigned Division
8-bit Unsigned Multiply
BCD arithmetic
Direct Addressing
Indirect Addressing
Nested Interrupt
Two priority level interrupt
A serial I/O port
Power save modes:
Idle mode and Power down mode
Code protection function
Low EMI (inhibit ALE)
Reset with address $0000 blank initiate ISP service program
ISP service program space configurable in N*512byte
(N=0 to 8) size
Bank mapping direct addressing mode for access on-chip
Dimension
page 24
page 25
page 26
Description
The SM5964 series product is an 8 - bit single chip
micro controller with 64KB flash & 1K byte RAM embed-
ded. It has In-System Programming (ISP) function and
is a derivative of the 8052 micro controller family. It has
5-channel SPWM build-in. User can access on-chip
expanded RAM with easier and faster way by its ‘bank
mapping direct addressing mode’ scheme. With its
hardware features and powerful instruction set, it’s
straight forward to make it a versatile and cost effective
controller for those applications which demand up to 32
I/O pins for PDIP package or up to 36 I/O pins for
PLCC/QFP package, or applications which need up to
64K byte flash memory either for program or for data or
mixed.
To program the on-chip flash memory, a commercial
writer is available to do it in parallel programming
method. The on-chip flash memory can be programmed
in either parallel or serial interface with its ISP feature.
Ordering Information
yywwv
SM5964ihhk
yy: year, ww:week
v: version identifier { , A, B, ...}
i: process identifier
hh: working clock in MHz {25, 40}
k: package type postfix {as below table}
Postfix
P
J
Q
Package
40L PDIP
44L PLCC
44L QFP
Pin/Pad
Configuration
page 2
page 2
page 2
RAM
Five channel Specific PWM (SPWM) build-in with P1.3 ~ P1.7
Taiwan
4F, No. 1 Creation Road 1,
Science-based Industrial Park,
Hsinchu, Taiwan 30077
TEL: 886-3-578-3344 #2667
886-3-579-2987
FAX: 886-3-5792960
886-3-5780493
Website: http://www.syncmos.com.tw
Specifications subject to change without notice,contact your sales representatives for the most recent information.
1/28
Ver 1.3
SM5964
07/02
SyncMOS Technologies Inc.
July 2002
SM5964
Pin Configurations
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
#EA
P4.1
P1.2
SPWM0/P1.3
SPWM1/P1.4
SPWM2/P1.5
SPWM3/P1.6
SPWM4/P1.7
RES
RXD/P3.0
TXD/P3.1
#INT0/P3.2
#INT1/P3.3
T0/P3.4
T1/P3.5
#WR/P3.6
#RD/P3.7
XTAL2
XTAL1
VSS
3
4
5
6
7
8
9
10
11
38
37
36
35
34
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
#EA
ALE
#PSEN
P2.7/A15
P2.6/A14
P2.5/A13
AD3/P0.3
AD2/P0.2
AD1/P0.1
AD0/P0.0
VDD
P4.2
T2/P1.0
T2EX/P1.1
P1.2
SPWM0/P1.3
SPWM1/P1.4
34
35
36
37
38
39
40
41
42
43
44
33 32 31 30 29 28 27 26 25 24 23
22
21
20
ALE
T2EX/P1.1
2
39
P0.0/AD0
#PSEN
40
P2.6/A14
P2.5/A13
VDD
P2.7/A15
T2/P1.0
1
P2.4/A12
P2.3/A11
P2.2/A10
P2.1/A9
P2.0/A8
P4.0
VSS
XTAL1
XTAL2
P3.7/#RD
P3.6/#WR
SM5964ihh-yyyP
33
32
31
30
29
28
27
26
25
24
23
22
21
SM5964ihh-yyyQ
19
18
44L QFP
17
(Top View)
16
15
14
13
12
1
2
3
4
5
6
7
8
9
10 11
40L PDIP
(Top View)
12
13
14
15
16
17
18
19
20
SPWM3/P1.6
SPWM4/P1.7
RES
SPWM2/P1.5
P4.3
T0/P3.4
RXD/P3.0
TXD/P3.1
P2.3/A11
P2.2/A10
P2.1/A9
P2.0/A8
P1.4/SPWM1
P1.3/SPWM0
P1.2
P1.1/T2EX
P1.0/T2
P4.2
VDD
P0.0/AD0
P0.1/AD1
6
5
4
3
2
SPWM2/P1.5
SPWM3/P1.6
SPWM4/P1.7
RES
RXD/P3.0
P4.3
TXD/P3.1
#INT0/P3.2
#INT1/P3.3
T0/P3.4
T1/P3.5
7
8
9
10
11
12
13
1 44 43 42 41 40
39
38
37
36
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
#EA
P4.1
ALE
#PSEN
P2.7/A15
P2.6FA14
P2.5/A13
SM5964ihh-yyyJ
44L PLCC
35
34
33
32
14
(Top View)
15
31
16
30
17
29
18 19 20 21 22 23 24 25 26 27 28
#WR/P3.6
#RD/P3.7
A8/P2.0
A9/P2.1
A10/P2.2
A11/P2.3
Specifications subject to change without notice,contact your sales representatives for the most recent information.
A12/P2.4
XTAL2
XTAL1
VSS
P4.0
2/28
#INT0/P3.2
Ver 1.3
#INT1/P3.3
T1/P3.5
P2.4/A12
SM5964
07/02
SyncMOS Technologies Inc.
July 2002
Block Diagram
Stack
Pointer
Decoder &
Register
1024 bytes
RAM
SM5964
Timer 2
Timer 1
Timer 0
WDT
RES
Reset
Circuit
to pertinent blocks
Acc
to whole chip
Buffer2
Buffer1
Buffer
DPTR
Vdd
Vss
Power
Circuit
PC
Incrementer
Interrupt
Circuit
to pertinent blocks
ALU
Program
Counter
XTAL2
XTAL1
#EA
ALE
#PSEN
Timing
Generator
to whole system
PSW
Register
Instruction
Register
ISP
SPWM
Port 0
Latch
Port 1
Latch
Port 2
Latch
Port 3
Latch
Port 4
Latch
64K
bytes
Flash
Memory
Port 0
Driver & Mux
8
Port 1
Driver & Mux
8
Port 2
Driver & Mux
8
Port 3
Driver & Mux
8
Port 4
Driver & Mux
4
Specifications subject to change without notice,contact your sales representatives for the most recent information.
3/28
Ver 1.3
SM5964
07/02
SyncMOS Technologies Inc.
July 2002
Pin Descriptions
40L 44L 44L
PDIP QFP PLCC
Pin# Pin# Pin#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
40
41
42
43
44
1
2
3
4
5
7
8
9
10
11
12
13
14
15
16
18
19
20
21
22
23
24
25
26
27
29
30
31
32
33
34
35
36
37
38
17
28
39
6
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
18
19
20
21
22
24
25
26
27
28
29
30
31
32
33
35
36
37
38
39
40
41
42
43
44
23
34
1
12
SM5964
Symbol
P1.0/T2
P1.1/T2EX
P1.2
P1.3/SPWM0
P1.4/SPWM1
P1.5/SPWM2
P1.6/SPWM3
P1.7/SPWM4
RES
P3.0/RXD
P3.1/TXD
P3.2/#INT0
P3.3/#INT1
P3.4/T0
P3.5/T1
P3.6/#WR
P3.7/#RD
XTAL2
XTAL1
VSS
P2.0/A8
P2. 1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
#PSEN
ALE
#EA
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
VDD
P4.0
P4.1
P4.2
P4.3
Active I/O
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
o
i
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
o
o
i
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
Names
bit 0 of port 1 & timer 2 clock out
bit 1 of port 1 & timer 2 control
bit 2 of port 1
bit 3 of port 1 & SPWM Channel 0
bit 4 of port 1 & SPWM Channel 1
bit 5 of port 1 & SPWM Channel 2
bit 6 of port 1 & SPWM Channel 3,
bit 7 of port 1 & SPWM Channel 4
Reset
bit 0 of port 3 & Receive data
bit 1 of port 3 & Transmit data
bit 2 of port 3 & low true interrupt 0
bit 3 of port 3 & low true interrupt 1
bit 4 of port 3 & Timer 0
bit 5 of port 3 & Timer 1
bit 6 of port 3 & ext. memory write
bit 7 of port 3 & ext. memory read
Crystal out
Crystal in
Sink Voltage, Ground
bit 0 of port 2 & bit 8 of external memory address
bit 1 of port 2 & bit 9 of external memory address
bit 2 of port 2 & bit 10 of external memory address
bit 3 of port 2 & bit 11 of external memory address
bit 4 of port 2 & bit 12 of external memory address
bit 5 of port 2 & bit 13 of external memory address
bit 6 of port 2 & bit 14 of external memory address
bit 7 of port 2 & bit 15 of external memory address
program storage enable
address latch enable
external access
bit 7 of port 0 & data/address bit 7 of external memory
bit 6 of port 0 & data/address bit 6 of external memory
bit 5 of port 0 & data/address bit 5 of external memory
bit 4 of port 0 & data/address bit 4 of external memory
bit 3 of port 0 & data/address bit 3 of external memory
bit 2 of port 0 & data/address bit 2 of external memory
bit 1 of port 0 & data/address bit 1 of external memory
bit 0 of port 0 & data/address bit 0 of external memory
Drive Voltage
bit 0 of Port 4
bit 1 of Port 4
bit 2 of Port 4
bit 3 of Port 4
H
L/ -
L/ -
L/ -
L/ -
L
-
L
Specifications subject to change without notice,contact your sales representatives for the most recent information.
4/28
Ver 1.3
SM5964
07/02
SyncMOS Technologies Inc.
July 2002
SM5964
Special Function Register (SFR)
The address $80 to $FF can be accessed by direct addressing mode only.
Address $80 to $FF is SFR area.
The following table list the SFRs which are identical to general 8052 as well as SM5964 Extension SFRs.
$F8
$F0
$E8
$E0
$D8
$D0
$C8
$C0
$B8
$B0
$A8
$A0
$98
$90
$88
$80
B
ACC
P4
PSW
T2CON
IP
P3
IE
P2
SCON
P1
TCON
P0
TMOD
SP
TL0
DPL
TL1
DPH
SBUF
SPWMC
P1CON
T2MOD
RCAP2L
RCAP2H
ISPFAH
ISPFAL
ISPFD
ISPC
$FF
$F7
$EF
$E7
$DF
TL2
TH2
SCONF
$D7
$CF
$C7
$BF
$B7
$AF
$A7
$9F
$97
$8F
$87
SPWMD4
SPWMD0
SPWMD1
SPWMD2
SPWMD3
WDTC
TH0
TH1
RCON
DBANK
PCON
Note: The text of SFRs with bold type characters are Extension Special Function Registers for SM5964
Addr
85H
86H
9BH
9FH
A3H
SFR
RCON
P1CON
WDTC
SPWMC
Reset
******00
BSE
SPWM4E
WDTE
SPWM3E
Reserve
SPWM2E
CLEAR
SPWM1E
BS3
SPWM0E
PS2
PS1
FPDIV1
SPWMD0.4 SPWMD0.3 SPWMD0.2 SPWMD0.1 SPWMD0.0 BRM0.2
SPWMD1.4 SPWMD1.3 SPWMD1.2 SPWMD1.1 SPWMD1.0 BRM1.2
SPWMD2.4 SPWMD2.3 SPWMD2.2 SPWMD2.1 SPWMD2.0 BRM2.2
SPWMD3.4 SPWMD3.3 SPWMD3.2 SPWMD3.1 SPWMD3.0 BRM3.2
SPWMD4.4 SPWMD4.3 SPWMD4.2 SPWMD4.1 SPWMD4.0 BRM4.2
WDR
*
*
*
*
*
P4.3
ISPE
*
P4.2
BRM0.1
BRM1.1
BRM2.1
BRM3.1
BRM4.1
OME
T2OE
P4.1
PS0
FPDIV0
BRM0.0
BRM1.0
BRM2.0
BRM3.0
BRM4.0
ALEI
DCEN
P4.0
BS2
00000***
0*0**000
******00
00H
00H
00H
00H
00H
0****010
******00
****1111
7
6
5
4
3
2
1
RAMS1
BS1
0
RAMS0
BS0
DBANK
0***0001
A4H
SPWMD0
A5H
SPWMD1
A6H
SPWMD2
A7H
SPWMD3
ACH
SPWMD4
BFH
C9H
D8H
SCONF
T2MOD
P4
Specifications subject to change without notice,contact your sales representatives for the most recent information.
5/28
Ver 1.3
SM5964
07/02
嵌入式系统
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