HY62SF16804B Series
512Kx16bit full CMOS SRAM
Document Title
512K x16 bit 1.8V Super Low Power Full CMOS slow SRAM
Revision History
Revision No
00
01
History
Initial Release
Draft Date
May.29.2001
Remark
Preliminary
Final
DC Electrical Characteristics
Oct.22.2002
- ICC changed 4mA -> 3mA
- ICC1 changed 25mA at 70ns -> 15mA at 70ns
- ICC1 changed 3mA at 1us -> 2mA at 1us
- ISB (TTL) changed 50uA -> 300uA
AC Test Loads
- (R1//R2) 4091Ohm // 3273Ohm -> 3070Ohm // 3150Ohm
AC Test Conditions
- Output Load changed 5pF -> 30pF
- Input Pulse Level 0.4V to 1.6V -> 0.2V to Vcc-0.2
Data Retention Electric Characteristic
- ICCDR LL-Part changed 20uA -> 10uA
This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.01 /Oct.2002
Hynix Semiconductor
HY62SF16804B
DESCRIPTION
The HY62SF16804B is a high speed, super low
power and 8Mbit full CMOS SRAM organized as
512K words by 16bits. The HY62SF16804B uses
high performance full CMOS process technology
and is designed for high speed and low power
circuit technology. It is particularly well-suited for
the high density low power system application.
This device has a data retention mode that
guarantees data to remain valid at a minimum
power supply voltage of 1.2V.
•
Fully static operation and Tri-state output
•
TTL compatible inputs and outputs
•
Battery backup(LL/SL-part)
- 1.2V(min) data retention
•
Standard pin configuration
- 48-fBGA
FEATURES
Product
Voltage
Speed
No.
(V)
(ns)
HY62SF16804B-C
1.65~2.3 70/85/100
HY62SF16804B-I
1.65~2.3 70/85/100
Note 1. C : Commercial, I : Industrial
2. Current value is max.
Operation
Current/Icc(mA)
3
3
Standby Current(uA)
LL
SL
15
8
15
8
Temperature
(°C)
0~70
-40~85
PIN CONNECTION
( Top View )
1
2
3
4
A1
A4
A6
5
A2
6
NC
A0
BLOCK DIAGRAM
ROW
DECODER
I/O1
SENSE AMP
A
B
C
D
E
F
G
H
/LB
/OE A0
IO9 /UB A3
IO10 IO11 A5
/CS IO1
ADD INPUT
BUFFER
COLUMN
DECODER
IO2 IO3
IO4 Vcc
I/O8
DATA I/O
BUFFER
PRE DECODER
Vss IO12 A17 A7
MEMORY ARRAY
256K x 16
WRITE DRIVER
I/O9
BLOCK
DECODER
Vcc IO13 Vss A16 IO5 Vss
IO15 IO14 A14 A15 IO6 IO7
IO16 NC
A18 A8
A12 A13 /WE IO8
A9
A10 A11 NC
A18
I/O16
/CS
/OE
/LB
/UB
/WE
PIN DESCRIPTION
Pin Name
/CS
/WE
/OE
/LB
/UB
Pin Function
Chip Select
Write Enable
Output Enable
Lower Byte Control(I/O1~I/O8)
Upper Byte Control(I/O9~I/O16)
Pin Name
I/O1~I/O16
A0~A18
Vcc
Vss
NC
Pin Function
Data Inputs / Outputs
Address Inputs
Power(1.65V~2.3V)
Ground
No Connection
Rev.01/Oct. 2002
2
HY62SF16804B
ORDERING INFORMATION
Part No.
Speed
HY62SF16804B-DFC
70/85/100
HY62SF16804B-SFC
70/85/100
HY62SF16804B-DFI
70/85/100
HY62SF16804B-SFI
70/85/100
Note 1. C : Commercial, I : Industrial
Power
LL-part
SL-part
LL-part
SL-part
Package
fBGA
fBGA
fBGA
fBGA
Temp.
C
C
I
I
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
V
IN,
V
OUT
Vcc
T
A
T
STG
P
D
T
SOLDER
Parameter
Input/Output Voltage
Power Supply
Operating Temperature
Storage Temperature
Power Dissipation
Ball Soldering Temperature & Time
Rating
-0.3 to Vcc+0.3
-0.3 to 2.6V
0 to 70
-40 to 85
-55 to 150
1.0
260
•
10
Unit
V
V
°C
°C
°C
W
°C •
sec
Remark
HY62SF16804B-C
HY62SF16804B-I
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.
TRUTH TABLE
/CS
H
X
L
L
L
/WE
X
X
H
H
H
/OE
X
X
H
H
L
/LB
X
H
L
X
L
H
L
L
H
L
/UB
X
H
X
L
H
L
L
H
L
L
Mode
Deselected
Deselected
Output Disabled
Output Disabled
Read
I/O
I/O1~I/O8 I/O9~I/O16
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D
OUT
High-Z
High-Z
D
OUT
D
OUT
D
OUT
D
IN
High-Z
High-Z
D
IN
D
IN
D
IN
Power
Standby
Standby
Active
Active
Active
L
L
X
Write
Active
Note:
1. H=V
IH
, L=V
IL
, X=don't care(V
IH or
V
IL)
2. UB, LB(Upper, Lower Byte enable)
These active LOW inputs allow individual bytes to be written or read.
When LB is LOW, data is written or read to the lower byte, I/O1 -I/O8.
When UB is LOW, data is written or read to the upper byte, I/O9 -I/O16.
Rev.01/Oct. 2002
2
HY62SF16804B
RECOMMENDED DC OPERATING CONDITION
Symbol
Vcc
Vss
V
IH
V
IL
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
1.65
0
1.4
-0.3
(1)
Typ.
1.8
0
-
Max.
2.3
0
Vcc+0.3
0.4
Unit
V
V
V
V
Note : 1. VIL = -1.5V for pulse width less than 30ns
DC ELECTRICAL CHARACTERISTICS
Vcc = 1.65V~2.3V, T
A
= 0°C to 70°C / -40°C to 85°C
Sym
Parameter
Test Condition
I
LI
Input Leakage Current
Vss < V
IN
< Vcc
Vss < V
OUT
< Vcc, /CS = V
IH
or
/
OE
=
V
IH
or /WE = V
IL,
I
LO
Output Leakage Current
/
UB
=
/LB = V
IH
Operating Power Supply
Icc
/CS = V
IL
, V
IN
= V
IH
or V
IL,
I
I/O =
0mA
Current
Cycle Time=Min,100% duty,
I
I/O =
0mA, /CS = V
IL,
V
IN
= V
IH
or V
IL
Average Operating
Icc1
Current
Cycle time = 1us, 100% duty,
I
I/O =
0mA, /CS < 0.2V, V
IN
<0.2V
/CS = V
IH
or /UB=/LB= V
IH
,
V
IN
= V
IH
or V
IL
/CS > Vcc - 0.2V or
Standby Current
/UB=/LB > Vcc-0.2V,
I
SB1
(CMOS Input)
V
IN
> Vcc-0.2V or
V
IN
< Vss+0.2V
V
OL
Output Low Voltage
I
OL
= 0.1mA
V
OH
Output High Voltage
I
OH =
-0.1mA
Note : 1. Typical values are at Vcc = 1.8V, T
A
= 25°C
2. Typical values are sampled and not 100% tested
I
SB
TTL Standby Current
(TTL Input)
Min.
-1
-1
-
Typ.
-
-
Max.
1
1
3
Unit
uA
uA
mA
mA
mA
uA
uA
V
V
-
-
-
-
-
-
1
-
1.4
-
-
15
2
300
8
15
0.2
-
SL
LL
-
CAPACITANCE
(Temp = 25°C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
Conditio
n
V
IN
= 0V
V
I/O
= 0V
Max.
8
10
Unit
pF
pF
Input Capacitance(Add, /CS, /WE, /UB, /LB, /OE)
Output Capacitance(I/O)
Note : These parameters are sampled and not 100% tested
Rev.01/Oct. 2002
3
HY62SF16804B
AC CHARATERISTICS
Vcc = 1.65V~2.3V, T
A
= 0°C to 70°C / -40°C to 85°C
#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Symbol
Parameter
-70
Min.
Max.
70
-
-
-
-
10
5
10
0
0
0
10
70
60
60
60
0
50
0
0
30
0
5
-
70
70
35
70
-
-
-
20
20
20
-
-
-
-
-
-
-
-
20
-
-
-
-85
Min.
Max.
85
-
-
-
-
10
5
10
0
0
0
10
85
70
70
70
0
60
0
0
35
0
5
-
85
85
40
85
-
-
-
30
30
30
-
-
-
-
-
-
-
-
25
-
-
-
-10
Min
Max.
100
-
-
-
-
10
5
10
0
0
0
15
100
80
80
80
0
70
0
0
45
0
10
-
100
100
45
100
-
-
-
30
30
30
-
-
-
-
-
-
-
-
25
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
READ CYCLE
tRC
Read Cycle Time
tAA
Address Access Time
tACS
Chip Select Access Time
tOE
Output Enable to Output Valid
tBA
/LB, /UB Access Time
tCLZ
Chip Select to Output in Low Z
tOLZ
Output Enable to Output in Low Z
tBLZ
/LB, /UB Enable to Output in Low Z
tCHZ
Chip Deselection to Output in High Z
tOHZ
Out Disable to Output in High Z
tBHZ
/LB, /UB Disable to Output in High Z
tOH
Output Hold from Address Change
WRITE CYCLE
tWC
Write Cycle Time
tCW
Chip Selection to End of Write
tAW
Address Valid to End of Write
tBW
/LB, /UB Valid to End of Write
tAS
Address Set-up Time
tWP
Write Pulse Width
tWR
Write Recovery Time
tWHZ
Write to Output in High Z
tDW
Data to Write Time Overlap
tDH
Data Hold from Write Time
tOW
Output Active from End of Write
AC TEST CONDITIONS
T
A
= 0°C to 70°C / -40°C to 85°C, unless otherwise specified
PARAMETER
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Level
tCLZ,tOLZ,tBLZ,tCHZ,tOHZ,tBHZ,tWHZ,tOW
Output Load
Other
Value
0.2V to Vcc-0.2V
5ns
0.9V
CL = 30pF + 1TTL Load
CL = 30pF + 1TTL Load
AC TEST LOADS
V
T M
= 1.8V
3070 O hm
D
OUT
CL(1)
3150 O hm
Note
1. Including jig and scope capacitance
Rev.01/Oct. 2002
4
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